CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.

An array substrate, a method for driving the array substrate, and a display device are provided. The array substrate includes: a plurality of data lines, a plurality of gate lines, and a plurality of pixel units arranged in an array, wherein each of the pixel units comprises one of one sub-pixel and a plurality of sub-pixels which are in the same row; sub-pixels comprised in pixel units which are in the same column are connected to the same one of the data lines; and two adjacent pixel units of pixel units which are in the same row are connected to different gate lines, and different sub-pixels in each of the pixel units are connected to different gate lines.

The present application discloses a display panel having a plurality of wirings in the fan-out area respectively connected to a plurality of signal lines in the display area, each of the plurality of wirings in the fan-out area configured to transmit a signal to one of a plurality of subpixels through one of the plurality of signal lines in the display area; and a plurality of bonding pads respectively connected to the plurality of wirings, configured to bond the plurality of wirings with a driver integrated circuit. The plurality of wirings are grouped into a plurality of groups of wirings comprising a first group of a plurality of first wirings and a second group of a plurality of second wirings. The plurality of first wirings are made of a first conductive material. The plurality of second wirings are made of a second conductive material. The second conductive material has a resistivity greater than that of the first conductive material.

The present disclosure provides a gate drive circuit, an array substrate, and a display device. The gate drive circuit includes cascaded shift registers, control circuits, level shifters, voltage stabilization circuits, and first exchanging circuits. The shift registers at respective stages output respective first signals. Each control circuit is configured to process the respective first signal to generate a respective second signal. Each level shifter is configured to convert the voltage level of the respective second signal to generate a respective third signal. Each voltage stabilization circuit is configured to stabilize the respective third signal. The stabilized third signal is outputted as a fourth signal. The first exchanging circuit is configured to enable any of the following: exchanging the first signals at two adjacent stages, exchanging the second signals at two adjacent stages, exchanging the third signals at two adjacent stages, and exchanging the fourth signals at two adjacent stages.

A pixel circuit and a driving method therefor, a display substrate, and a display device are provided. The pixel circuit includes: a light-emitting control circuit, used to control a potential of a first node in response to a first scan signal from a first scan signal terminal and a data signal from a data signal terminal, output a direct current power signal provided by a direct current power terminal to a second node in response to a light-emitting control signal from a light-emitting control signal terminal, and control switching-on and switching-off between a third node and a light-emitting element; a compensation circuit, used to adjust the potential of the first node according to a potential of the second node; and a driving circuit, used to output a driving signal to the third node in response to the potential of the first node and the potential of the second node.

Embodiments of the present disclosure provides an array substrate and a manufacturing method thereof, a display panel. The array substrate includes: a base ( 10 ); a pixel electrode ( 50 ) and a thin film transistor disposed on the base ( 10 ); a passivation layer ( 16 ) covering the thin film transistor and the pixel electrode ( 50 ), the passivation layer ( 16 ) being provided with a transferring through hole (K 1 , K 2 ) that simultaneously exposes the pixel electrode ( 50 ) and a drain electrode ( 15 ) or a source electrode ( 14 ) of the thin film transistor; a connection electrode ( 60 ) disposed on the passivation layer ( 16 ) and at the transferring through hole (K 1 , K 2 ), the connection electrode ( 60 ) connected with the pixel electrode ( 50 ), and the drain electrode ( 15 ) or the source electrode ( 14 ) through the transferring through hole (K 1 , K 2 ). The present disclosure realizes a connection between the drain electrode ( 15 ) or the source electrode ( 14 ) and the pixel electrode ( 50 ) by using one transferring through hole (K 1 , K 2 ), which effectively reduces the number of through holes, increases an aperture ratio of the display panel, improves product quality and yield.

Provided are a pixel driving circuit, a pixel driving method and a display panel. The pixel driving circuit includes: a driving circuit, a light emitting circuit, a storage circuit, a reset circuit, a light emitting control circuit and a writing compensation circuit; a first electrode of the storage circuit is coupled to a first node, a second electrode of the storage circuit is coupled to a second node; the reset circuit adjusts voltages of the first node and the second node; the writing compensation circuit writes a data signal of a data line terminal and a compensation data into the driving circuit through an adjustment of the storage circuit; the light emitting control circuit writes a display current, a magnitude of which is related only to the data signal and a voltage of the first voltage terminal, to the light emitting circuit by controlling the driving circuit.

A thin film transistor is disclosed. The thin-film transistor includes an active layer ( 3 ); a source electrode ( 1 ); and a drain electrode ( 2 ). The active layer includes an active pattern region ( 4 ), the active pattern region including a main body portion ( 5 ) and a plurality of protrusion portions ( 6 ) on both sides of the main body portion. The protrusion portions are connected to the main body portion.

An array substrate includes: a base substrate, a gate line extending in a first direction, a data line extending in a second direction, and a pixel electrode layer, the first direction being substantially perpendicular to the second direction, the gate line and the data line defining a plurality of sub-pixel units, and a plurality of first and second common electrode lines electrically connected to each other and disposed in the same layer as the gate lines. The first common electrode line includes two first common electrode line first portions, and the second common electrode line extends in the second direction. The second common electrode line is located between and electrically connects the two first common electrode line first portions. The second common electrode line is located at a center line of the sub-pixel unit.

The present disclosure provides a pixel structure, a method of driving the same and a display device. The pixel structure includes gate lines, data lines, and a plurality of subpixels arranged in an array form. Subpixels in each row correspond to two gate lines. Each data line corresponds to the subpixels in two adjacent columns, and each data line is arranged between the two adjacent columns of subpixels. Among the subpixels in each row, three adjacent subpixels are in different colors and forms a complete pixel unit. Among the subpixels in each column, three adjacent subpixels are in different colors and forms the complete pixel unit. Among the subpixels in two adjacent columns, the subpixels in two adjacent rows form two complete pixel units each including three subpixels, and two of the three subpixels are shared by the two pixel unit.

Embodiments of the present disclosure provide an array substrate, a method for manufacturing the same, and a display apparatus. The array substrate includes a plurality of pad structures located in a bonding region and a plurality of data leads located in a lead region. Each data lead corresponds to one pad structure. The pad structure includes at least two pad electrodes insulated from each other. In the pad structure, each pad electrode is electrically connected to the data lead corresponding to the pad structure, respectively, to form different signal writing paths.