HANNSTAR DISPLAY CORPORATION

A pixel array substrate structure includes a substrate, a first metal layer, a second metal layer, a shielding electrode layer, and a pixel electrode layer. The first metal layer is over the substrate and has scan lines. The second metal layer is over the first metal layer and has data lines. The scan lines and the data lines define pixel areas. The shielding electrode layer is over the second metal layer and includes shielding electrodes. The shielding electrodes are in the pixel areas, respectively, and cover the scan lines and the data lines in the vertical projection direction of the substrate. The pixel electrode layer is over the shielding electrode layer and has pixel electrodes. The pixel electrodes are in the pixel areas, respectively.

A display device has a display area and a peripheral area, and includes an array substrate. The array substrate includes M number of pixel unit columns disposed in the display area and a first dummy electrode disposed in the peripheral area, where M is a positive integer greater than or equal to 2. The M number of pixel unit columns include a first pixel unit column to an M th pixel unit column arranged in sequence. Each of the M number of pixel unit columns includes a plurality of pixel units arranged in sequence. The first dummy electrode is located on one side of the first pixel unit column. During a frame period, the first pixel unit column receives the first pixel signal, and the first dummy electrode receives the first dummy signal. The polarity of the first pixel signal is different from that of the first dummy signal.

A display panel includes a substrate, pixels, gate lines, a gate connecting line, a common line and a compensation electrode. The pixels are disposed on the substrate. The gate lines are disposed on the substrate and are configured to receive scan signals. The number of pixels coupled to a first gate line of the gate lines is less that the number of pixels coupled to a second gate line of the gate lines. The gate connecting line is electrically connected to the first gate line. The common line is disposed under the gate connecting line, and is configured to receive a common voltage signal. The compensation electrode is disposed over the gate connecting line, and is configured to receive the common voltage signal. The common line, the gate connecting line and the compensation electrode are overlapped.

A display panel, including a first substrate, a second substrate, a liquid crystal layer, multiple data lines, multiple scan lines, multiple touch signal lines, multiple pixel structures, multiple bridge pads, multiple electrode patterns, and multiple first spacers. The liquid crystal layer is disposed between the first substrate and the second substrate. The bridge pads are disposed on the first substrate and are electrically connected to the touch signal lines respectively. The electrode patterns are respectively arranged on the second substrate at intervals along a first direction and a second direction, and overlap the pixel electrodes of the pixel structures. The first spacers are disposed on the second substrate and respectively abut on the bridge pads along a stacking direction of the first substrate and the second substrate. Each of the electrode patterns covers one of the first spacers to be electrically connected to one of the bridge pads.

A display panel including a first substrate, a second substrate, a liquid crystal layer, data lines, scan lines, pixel structures, a first common electrode layer, bridge patterns, first spacers, and a second common electrode layer is provided. The liquid crystal layer is disposed between the first substrate and the second substrate. The data lines and the scan lines are disposed on the first substrate and intersect each other. Each of the pixel structures has an active device and a pixel electrode. The first common electrode layer and the bridge patterns are disposed on the first substrate and electrically connected to each other. The first common electrode layer overlaps the pixel structures. The first spacers are disposed on the second substrate and respectively abut the bridge patterns. The second common electrode layer disposed on the second substrate covers the first spacers to electrically connect the bridge patterns.

A color filter substrate including a substrate and a color resist structure is disclosed. The substrate has a pixel region, and the pixel region includes a first sub-pixel region, a second sub-pixel region and a third sub-pixel region. The color resist structure is disposed on the substrate, and the color resist structure includes a first color resist, a second color resist and a third color resist. The first color resist is disposed in the first sub-pixel region. The second color resist is disposed in the second sub-pixel region. A portion of the third color resist is disposed in at least one of the first sub-pixel region and the second sub-pixel region, and another portion of the third color resist is disposed in the third sub-pixel region. The first color resist, the second color resist and the third color resist have different colors from each other.

A display panel including a first substrate, a second substrate, a pixel structure, a liquid crystal layer and a light shielding layer is provided. The first substrate and the second substrate are overlapped with each other along a stacking direction. The pixel structure is disposed on the first substrate and has an active device and a reflective electrode electrically connected to each other. The liquid crystal layer is disposed between the first substrate and the second substrate. The light shielding layer is disposed on the second substrate and includes a first light shielding pattern. The first light shielding pattern overlaps the reflective electrode of the pixel structure along the stacking direction.

A pixel array substrate including a substrate, an insulation layer, and multiple pixel structures is provided. The insulation layer is disposed on the substrate. The pixel structures are disposed on the substrate, and each includes an active device and a reflective layer. The active device is disposed between the substrate and the insulation layer. The reflective layer is disposed on the insulation layer, and includes a silver-based reflective layer and a protective layer. The silver-based reflective layer has a reflective surface. The protective layer covers the silver-based reflective layer. A thickness of the protective layer along a normal direction of the reflective surface is greater than or equal to 30 angstroms and less than or equal to 80 angstroms. Another pixel array substrate having a buffer layer is also provided.

A reflective display panel having a pixel structure is provided. The pixel structure has a reflective area, and includes an active device, an insulation layer and a reflective layer. The insulation layer is disposed above the active device. The reflective layer is disposed on the insulation layer and located in the reflective area. The reflective layer includes a silver alloy layer. The material of the silver alloy layer includes silver with a weight percentage greater than 90% and indium with a weight percentage greater than or equal to 2% and less than or equal to 8%. A sputtering target suitable for depositing the silver alloy layer is also provided.

A display panel including a first substrate, a second substrate, a plurality of pixel structures and a liquid crystal layer is provided. The first substrate and the second substrate are overlapped with each other. The pixel structures are disposed on the first substrate and respectively provided with a plurality of reflective patterns. Each of the reflective patterns is divided into a plurality of reflective portions by a plurality of micro-slits. The reflective portions are connected to each other. The liquid crystal layer is disposed between the first substrate and the second substrate.