Company patents
Advanced Micro Devices, Inc.
Advanced Micro Devices, Inc.'s patent strategy reveals a surprising shift away from core computing hardware, with Computer Hardware Architecture, its largest category at 28.6% of the portfolio, showing a -62.1% decline in 2026 so far. While categories like Multi-Chip & 3D Assemblies and Chip-to-Chip Interconnect saw strong growth in 2024-2025 (46.2% and 30.4% YoY respectively), the significant year-to-date declines across most categories in 2026, including a -82.6% drop in Semiconductor Packaging & Encapsulation, suggest a potential re-evaluation or slowdown in patenting activity across its portfolio.
Patent Trend by Technology Area
Yearly patent publications since 2023
Product themes
Product-level themes inferred from filings since 2023, with category chips showing where each theme appears. Select a theme to filter the patents below.
2,697 US filings (since 2023) · 12 categories · 38 themes
Hardware and control techniques for optimizing memory access latency, ensuring data integrity, and managing storage resources efficiently. This includes error correction, read/write voltage control, and intelligent data placement or in-memory computation.
Novel hardware designs and processing pipelines tailored for specific computational tasks, such as graphics rendering, neural network operations, or matrix transformations, often involving custom circuits, memory arrays, or data flow mechanisms.
Combining different types of functional chiplets (e.g., compute, memory, I/O, optical, power, biological) into a single package or system, often to optimize performance, power, or cost by leveraging specialized components.
Specialized hardware, architectural designs, and computational methods to improve the speed, efficiency, and security of artificial intelligence and machine learning model execution, particularly for inference and data processing.
Methods and systems for efficiently allocating computing resources, balancing workloads, and managing power states to improve performance, reduce energy consumption, or enhance reliability in computing platforms.
Methods and circuits for detecting and mitigating defects, ensuring data integrity, and enabling self-testing and repair mechanisms within memory devices and subsystems.
Techniques and hardware architectures designed to efficiently generate and display complex 3D graphics, particularly for interactive applications like virtual reality, focusing on speed and visual quality.
Techniques for stacking multiple semiconductor dies or active layers vertically to achieve higher density and shorter interconnections, often utilizing through-silicon vias (TSVs) or other vertical conductive paths like through-hole electrodes.
Methods and apparatus for improving the visual fidelity, resolution, or compression efficiency of video signals, often through advanced processing, up-scaling, or neural network-based filters.
Focuses on the physical design, materials, and manufacturing processes for individual memory cells, including transistor structures, interconnects, and multi-layered (3D) architectures to enhance density and performance.
Technologies for establishing and managing high-bandwidth, low-latency communication pathways between computing components, peripherals, or systems, focusing on signal integrity, synchronization, and interface standards.
Integrated circuits or sub-circuits designed to regulate, balance, or protect power delivery within a device, often involving specific transistor and capacitor arrangements.
Methods and systems for improving the quality of video streams, generating intermediate frames, or continuously locating and following objects within a sequence of images, even under occlusion.
Design and operation of analog and mixed-signal circuits within the memory array, such as page buffers, sense amplifiers, and data latches, responsible for reading and writing data from/to memory cells.
Techniques for efficiently supplying power to electronic devices, managing battery charge/discharge cycles, optimizing power consumption, and converting power between different voltage levels or AC/DC for improved energy efficiency and longevity.
Packaging technologies where bare dies are embedded within a mold compound or substrate cavity, and then interconnected using redistribution layers (RDLs) for fan-out or compact integration, often avoiding through-silicon vias in the chips themselves.
Integrated solutions for dissipating heat generated by high-density semiconductor devices within the package, including embedded cooling structures, cold plates, and optimized fluidic channels.
Technologies enabling the creation and management of virtual computing environments, including virtual machines and virtual desktops, with an emphasis on secure and efficient remote access, updates, and performance.
Novel electrical connection methods within or between package components, including through-glass vias (TGVs), backside contacts, and optimized redistribution layers for improved signal and power integrity.
Technologies that create dynamic and interactive visual content for displays, including virtual/wearable systems, by generating overlays, replacing input streams, or merging real-time user actions with digital environments.
Novel materials and processes for forming low-resistance electrical contacts and interconnects within semiconductor devices, including selective deposition, silicidation, and barrier layers for improved performance and scaling.
Developing and applying machine learning algorithms that leverage quantum computing principles, such as quantum circuits or autoencoders, for tasks like simulation or data processing.
Involves systems designed to automatically detect errors or failures and initiate predefined or intelligent corrective actions, recovery procedures, or notifications to minimize downtime and manual intervention.
Techniques for generating human-like text or other content using large pre-trained models, often involving prompt engineering, speculative decoding, or multi-modal inputs for content creation.
Techniques for monitoring system components and behaviors to anticipate failures, performance degradation, or anomalies, often leveraging machine learning for pattern recognition and forecasting.
Development of novel materials and designs for bonding, sealing, and underfill applications, focusing on improving mechanical integrity, electrical performance, and preventing defects like cracks or delamination in chip-to-chip connections.
Techniques utilizing deep learning models like Generative Adversarial Networks (GANs) or diffusion models to create new images, modify existing ones, or generate synthetic data based on various inputs or conditions.
Systems and methods for automating the lifecycle of machine learning models, including pipeline deployment, model management, versioning, and configuring for different inference environments.
Processes for creating or manipulating three-dimensional digital representations of objects or environments, including mesh generation, surface fitting, and depth estimation from multiple views.
Methods for temporarily attaching a wafer or substrate to a carrier for thinning, dicing, or other processing, followed by controlled debonding, often using light-sensitive resins, temporary adhesives, or roughened interfaces.
Systems that combine data from multiple camera sensors or capture multiple images from different perspectives or qualities, often involving image processing techniques like synthesis to create enhanced or comprehensive views.
Designing user interfaces and interaction methods specifically for mobile or wearable devices, enabling control of external systems, monitoring user states, or facilitating real-world transactions.
Engineering solutions for creating electronic devices with bendable, foldable, or stretchable form factors, often involving hinges, flexible displays, and sliding mechanisms to enable dynamic physical configurations.
Methods for training machine learning models across multiple decentralized devices or servers while keeping data localized, often involving aggregation of model parameters and secure communication.
User interface designs and systems that enable multiple users to interact with shared content, provide feedback, or coordinate activities, often across different devices or locations.
Development and application of resin compositions, molding compounds, and underfill materials to protect semiconductor devices from environmental factors, moisture, mechanical stress, and for structural integrity.
Encompasses strategies and technologies to ensure the availability, integrity, and recoverability of data and systems, including robust backup, replication, error correction, and efficient data restoration.
Utilizing machine learning, particularly deep learning, to analyze medical data such as images, sensor readings, or physiological signals for disease prediction, diagnosis, or treatment assessment.
Patents
Showing 1-10 of 160
Advanced Memory Cell Structures