Company patents

ADVANTEST CORPORATION

ADVANTEST CORPORATION's patent strategy, while heavily concentrated in Electrical Measurement (62.5% of its portfolio), shows a surprising emerging focus in Material & Chemical Analysis, with a consistent growth of 20.0% in 2025 and 16.7% so far in 2026, indicating a diversification beyond its core. Conversely, categories like System Reliability & Diagnostics and Semiconductor Manufacturing Process, despite rapid growth in 2024, appear to be shifting priorities with significant declines of 100.0% so far in 2026.

Patent Trend by Technology Area

Yearly patent publications since 2023

Product themes

Product-level themes inferred from filings since 2023, with category chips showing where each theme appears. Select a theme to filter the patents below.

320 US filings (since 2023) · 12 categories · 21 themes

Semiconductor Electrical Test

Techniques and apparatus for electrically testing semiconductor devices, integrated circuits, or wafers during manufacturing or post-assembly, including built-in self-test (BIST) and contact reliability assessment.

Electrical Measurement
Who else files here? →
189since 2023
+5.1%YoY
Advanced Material Characterization

Techniques and systems for precisely measuring electrical or electromagnetic properties of materials or components, often involving specialized resonators, waveguides, or multi-range measurement systems to ensure accuracy.

Electrical Measurement
Who else files here? →
51since 2023
+6.7%YoY
Memory Reliability, Testing & Repair

Methods and circuits for detecting and mitigating defects, ensuring data integrity, and enabling self-testing and repair mechanisms within memory devices and subsystems.

Memory & Storage (Static)
Who else files here? →
33since 2023
-7.1%YoY
Magnetic Resonance Sensing

Methods and apparatus for measuring magnetic fields or utilizing magnetic resonance principles for medical diagnostics, material analysis, or precise localization, including gradient field measurement in MRI.

Electrical Measurement
Who else files here? →
12since 2023
+66.7%YoY
Signal Non-Linearity & Calibration

Techniques and circuits designed to identify, compensate for, or correct non-linearities, offsets, and other imperfections in signal processing paths, particularly within analog-to-digital, digital-to-analog, or digital-to-time converters.

Coding & Decoding
Who else files here? →
10since 2023
+66.7%YoY
Memory System Performance & Reliabilityfiltered

Hardware and control techniques for optimizing memory access latency, ensuring data integrity, and managing storage resources efficiently. This includes error correction, read/write voltage control, and intelligent data placement or in-memory computation.

Memory & Storage (Static)
Who else files here? →
7since 2023
+50.0%YoY
High-Performance ADC/DAC Architectures

Focuses on the architectural and circuit-level innovations for Analog-to-Digital Converters (ADCs) and Digital-to-Analog Converters (DACs) to improve speed, accuracy, linearity, and power efficiency. Includes specific types like SAR and Delta-Sigma, and their constituent components.

Coding & Decoding
Who else files here? →
6since 2023
+100.0%YoY
Power Consumption & Current Sensing

Devices and methods for accurately measuring or monitoring electrical current draw and power usage in various systems, often for control, optimization, or safety purposes.

Electrical Measurement
Who else files here? →
6since 2023
new
3D Die Stacking & Vertical Interconnects

Techniques for stacking multiple semiconductor dies or active layers vertically to achieve higher density and shorter interconnections, often utilizing through-silicon vias (TSVs) or other vertical conductive paths like through-hole electrodes.

Semiconductor Packaging & Encapsulation
Who else files here? →
6since 2023
0.0%YoY
Digital Filtering & Signal Equalization

Methods and architectures for processing digital signals to enhance quality, remove noise, manage group delay, and facilitate symbol decision, often involving digital filters and equalization techniques.

Coding & Decoding
Who else files here? →
5since 2023
+50.0%YoY
Advanced Power Converter Topologies

Focuses on novel circuit configurations for DC-DC, DC-AC, or AC-DC conversion, often involving resonant operation, multi-level structures, or switched capacitors to improve efficiency, power density, or voltage conversion ratios.

Power Conversion (DC/AC, DC/DC)
Who else files here? →
5since 2023
new
Wafer Handling and Process Environment Control

Systems and methods for automated substrate transport, precise positioning, temperature regulation, and chamber environment management to ensure process stability, uniformity, and yield in semiconductor manufacturing.

Semiconductor Manufacturing Process
Who else files here? →
5since 2023
n/a
Advanced Memory Cell Structures

Focuses on the physical design, materials, and manufacturing processes for individual memory cells, including transistor structures, interconnects, and multi-layered (3D) architectures to enhance density and performance.

Memory & Storage (Static)
Who else files here? →
4since 2023
-50.0%YoY
Package Thermal Management

Integrated solutions for dissipating heat generated by high-density semiconductor devices within the package, including embedded cooling structures, cold plates, and optimized fluidic channels.

Semiconductor Manufacturing ProcessSemiconductor Packaging & Encapsulation
Who else files here? →
3since 2023
-50.0%YoY
High-Density Magnetic Component Integration

Techniques for designing and manufacturing compact, multi-functional magnetic components, such as inductors, transformers, and coils, often involving embedded structures, multilayer designs, or shared magnetic circuits to achieve higher power density or smaller form factors.

Magnets & Inductors
Who else files here? →
3since 2023
new
In-Memory Sensing & Data Path

Design and operation of analog and mixed-signal circuits within the memory array, such as page buffers, sense amplifiers, and data latches, responsible for reading and writing data from/to memory cells.

Memory & Storage (Static)
Who else files here? →
2since 2023
new
Battery Management Systems

Software, algorithms, and associated hardware for monitoring, controlling, and optimizing battery performance, safety, and lifespan, including charge/discharge cycles, thermal regulation, and system integration.

Electrical Measurement
Who else files here? →
2since 2023
n/a
Motor System Fault Detection

Methods and systems for identifying anomalies, failures, or impending issues within electric motors or their associated drive and power management circuits, often by monitoring electrical or operational parameters.

Electrical Measurement
Who else files here? →
1since 2023
n/a
Advanced Biomarker Detection Assays

Methods and compositions for identifying, quantifying, or characterizing specific biological molecules (e.g., nucleic acids, proteins, metabolites, antibodies) or microbial species, often for diagnostic, prognostic, or quality control applications.

Material & Chemical Analysis
Who else files here? →
1since 2023
n/a
Secure Data Storage & Provenance

Techniques for protecting data at rest or in backup, ensuring its integrity, confidentiality, and verifiable origin, often involving encryption, unique identifiers, or secure repositories.

Computer Security
Who else files here? →
1since 2023
n/a
Secure Data Sharing & Rights Management

Mechanisms to facilitate the secure exchange of data between different entities or systems while enforcing usage policies, managing digital content rights, and ensuring data consistency during replication or transfer.

Computer Security
Who else files here? →
1since 2023
n/a

Patents

Page 2 of 2
US 10884847 B1GRANTED
G06F11/10

Fast parallel CRC determination to support SSD testing

Filed:2019-08-20Pub:2021-01-05
Applicant:Advantest Corporation

Fast parallel CRC determination to support SSD testing includes a test data pattern generator for generating test data for storage onto a memory storage device under test (DUT), wherein the generator is operable to generate, every clock cycle, a respective N bit word comprising a plurality of M bit subwords, a digest circuit operable to employ a digest function on each N bit word to produce, every clock cycle, a respective word digest for each N bit word, and a storage circuit operable to store each N bit word along with an associated word digest to the DUT. The digest circuit includes a plurality of first circuits each operable to perform a first digest function on a respective subword of the plurality of subwords, in parallel, to produce a plurality of subword digests, a plurality of second circuits each operable to perform a second digest function on a respective subword digest of the plurality of subword digests, the second digest function being equivalent to shifting the respective subword digest through a linear feedback shift register (LFSR) then followed by (I×M) zero bits, wherein I is related to a word position, within the N bit word, of a respective subword that generated the respective subword digest, and an XOR circuit operable to XOR outputs of the plurality of second circuits together along with a shifted prior LFSR state to produce the word digest of the N bit word.