UnfoldIPThemes

Company patents

Eugenus, Inc.

Eugenus, Inc. demonstrates a surprising patent strategy with a strong, albeit fluctuating, focus on Coating & Surface Treatment, which represents 64.9% of its portfolio and saw a remarkable 140.0% YoY growth in 2025. While Semiconductor Manufacturing Process also experienced a significant 450.0% YoY surge in 2025, the sharp decline in patenting activity for both categories so far in 2026 (down 83.3% and 100.0% respectively) suggests a potential shift in priorities or a highly cyclical innovation pipeline.

Patent Trend by Technology Area

Yearly patent publications since 2023

Product themes

Product-level themes inferred from filings since 2023, with category chips showing where each theme appears. Select a theme to filter the patents below.

37 US filings (since 2023) · 10 categories · 9 themes

Conformal & Selective Film Deposition

Methods for depositing thin films with controlled conformality, thickness, and material properties, including selective deposition on specific areas, often using atomic layer deposition (ALD), chemical vapor deposition (CVD), or epitaxial growth.

Coating & Surface TreatmentSemiconductor Manufacturing Process
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24since 2023
+140.0%YoY
Advanced Metallization & Contacts

Novel materials and processes for forming low-resistance electrical contacts and interconnects within semiconductor devices, including selective deposition, silicidation, and barrier layers for improved performance and scaling.

Semiconductor Diodes & Transistors
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20since 2023
+175.0%YoY
Resistive & Phase Change Memory

Development of memory cells utilizing resistive switching or phase-change materials, including novel material compositions, multi-layered structures, and integration with selector devices like bipolar junction transistors, to achieve non-volatile storage.

Inorganic Devices (Thermoelectric, Piezo)Memory Devices (Structural)
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5since 2023
-50.0%YoY
Advanced Deposition Chamber Hardware

Design and engineering of specialized components within deposition systems, such as heaters, targets, susceptors, and chamber walls, to achieve precise control over process parameters like temperature, material flux, and plasma characteristics.

Coating & Surface Treatment
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4since 2023
-66.7%YoY
Advanced Memory Cell Structuresfiltered

Focuses on the physical design, materials, and manufacturing processes for individual memory cells, including transistor structures, interconnects, and multi-layered (3D) architectures to enhance density and performance.

Memory Devices (Structural)
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2since 2023
new
In-situ Coating Process Diagnostics

Methods and systems for real-time monitoring and control of coating processes or chamber cleaning, utilizing sensor data (e.g., thermal, pressure, optical) and predictive models to ensure quality and optimize efficiency.

Coating & Surface Treatment
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2since 2023
n/a
Wafer Handling and Process Environment Control

Systems and methods for automated substrate transport, precise positioning, temperature regulation, and chamber environment management to ensure process stability, uniformity, and yield in semiconductor manufacturing.

Semiconductor Manufacturing Process
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2since 2023
n/a
Wear & Corrosion Resistant Coatings

Application of protective layers to improve the durability and longevity of components by enhancing resistance to wear, oxidation, or chemical degradation in demanding operational environments.

Coating & Surface Treatment
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1since 2023
n/a
Functional Coatings and Surface Modifiers

Additives or compositions specifically formulated for surface application or modification to impart protective, decorative, or specialized functional properties to polymer products.

Coating Compositions (Paints, Inks)
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1since 2023
n/a

Patents

Showing 1-3 of 3

Advanced Memory Cell Structures
Page 1 of 1
US 12408569 B2GRANTED
H10N70/00

Titanium silicon nitride barrier layer

Filed:2023-10-17Pub:2025-09-02
Applicant:Eugenus, Inc.

The disclosed technology generally relates to a barrier layer comprising titanium silicon nitride, and more particularly to a barrier layer for nonvolatile memory devices, and methods of forming the same. In one aspect, a method of forming an electrode for a phase change memory device comprises forming over a semiconductor substrate an electrode comprising titanium silicon nitride (TiSiN) on a phase change storage element configured to store a memory state. Forming the electrode comprises exposing a semiconductor substrate to one or more cyclical vapor deposition cycles, wherein a plurality of the cyclical vapor deposition cycles comprises an exposure to a Ti precursor, an exposure to a N precursor and an exposure to a Si precursor.

US 11832537 B2GRANTED
H10N70/00

Titanium silicon nitride barrier layer

Filed:2019-10-08Pub:2023-11-28
Applicant:Eugenus, Inc.

The disclosed technology generally relates to a barrier layer comprising titanium silicon nitride, and more particularly to a barrier layer for nonvolatile memory devices, and methods of forming the same. In one aspect, a method of forming an electrode for a phase change memory device comprises forming over a semiconductor substrate an electrode comprising titanium silicon nitride (TiSiN) on a phase change storage element configured to store a memory state. Forming the electrode comprises exposing a semiconductor substrate to one or more cyclical vapor deposition cycles, wherein a plurality of the cyclical vapor deposition cycles comprises an exposure to a Ti precursor, an exposure to a N precursor and an exposure to a Si precursor.

US 20210104665 A1APPLICATION
H01L45/00

TITANIUM SILICON NITRIDE BARRIER LAYER

Filed:2019-10-08Pub:2021-04-08
Applicant:Eugenus, Inc.

The disclosed technology generally relates to a barrier layer comprising titanium silicon nitride, and more particularly to a barrier layer for nonvolatile memory devices, and methods of forming the same. In one aspect, a method of forming an electrode for a phase change memory device comprises forming over a semiconductor substrate an electrode comprising titanium silicon nitride (TiSiN) on a phase change storage element configured to store a memory state. Forming the electrode comprises exposing a semiconductor substrate to one or more cyclical vapor deposition cycles, wherein a plurality of the cyclical vapor deposition cycles comprises an exposure to a Ti precursor, an exposure to a N precursor and an exposure to a Si precursor.

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