EV GROUP E. THALLNER GMBH

Methods for temporarily attaching a wafer or substrate to a carrier for thinning, dicing, or other processing, followed by controlled debonding, often using light-sensitive resins, temporary adhesives, or roughened interfaces.

Inspection and testing methods specifically designed for wafers before, during, or after bonding processes, including verification of bonding surfaces, alignment, and defect detection in multi-wafer or stacked die assemblies.

Systems and methods for automated substrate transport, precise positioning, temperature regulation, and chamber environment management to ensure process stability, uniformity, and yield in semiconductor manufacturing.

Novel materials and processes for forming low-resistance electrical contacts and interconnects within semiconductor devices, including selective deposition, silicidation, and barrier layers for improved performance and scaling.

Techniques and apparatus for measuring critical dimensions, overlay accuracy, defect detection, and surface topography in lithographic processes, often involving optical, laser, or charged particle beams.

Techniques for precise material removal, pattern shaping, and controlling etch selectivity or uniformity, often involving plasma, wet chemistry, or directed beams to achieve desired features on semiconductor substrates.

Innovations in the design, materials, and manufacturing of lithography masks, including reflective masks, programmable masks, and defect mitigation strategies, to enable finer feature patterning and process control.

Development of novel materials and designs for bonding, sealing, and underfill applications, focusing on improving mechanical integrity, electrical performance, and preventing defects like cracks or delamination in chip-to-chip connections.

Techniques for combining multiple materials or layers, often with specialized surface treatments, coatings, or assembly methods, to create functional or aesthetically enhanced plastic articles, including consumer goods and encapsulated electronics.

Techniques for stacking multiple semiconductor dies or active layers vertically to achieve higher density and shorter interconnections, often utilizing through-silicon vias (TSVs) or other vertical conductive paths like through-hole electrodes.

Processes involving chemical and mechanical forces to planarize surfaces (CMP) or wet chemical treatments for cleaning, etching, or material removal, often utilizing specialized compositions, nozzles, or fluid management systems.

Methods and equipment for continuously shaping plastic materials by forcing them through a die, often involving screw extruders, heating elements, and downstream calibration.

Processes involving the application of heat and pressure to shape thermoplastic or elastomeric materials, often using molds or presses, to achieve specific forms or material properties.

Systems and methods for accurately measuring and compensating for position, orientation, and movement errors in mechanical systems, often for manufacturing, robotics, or optical alignment.