Company patents
IMEC VZW
IMEC VZW's patent strategy reveals a dynamic shift, with a surprising emergence in Semiconductor Diodes & Transistors, which accounted for 9.8% of its portfolio and saw 45 patents in 2025, despite no activity in 2023-2024. Concurrently, there's a clear shift away from Transistor & Device Structure and Integrated Circuit Layout & Arrangement, both experiencing a 100.0% decline in 2026 so far, indicating a strategic reprioritization within its core semiconductor focus.
Patent Trend by Technology Area
Yearly patent publications since 2023
Product themes
Product-level themes inferred from filings since 2023, with category chips showing where each theme appears. Select a theme to filter the patents below.
704 US filings (since 2023) · 12 categories · 42 themes
Focuses on the physical design, materials, and manufacturing processes for individual memory cells, including transistor structures, interconnects, and multi-layered (3D) architectures to enhance density and performance.
Techniques for stacking multiple semiconductor dies or active layers vertically to achieve higher density and shorter interconnections, often utilizing through-silicon vias (TSVs) or other vertical conductive paths like through-hole electrodes.
Design and operation of transistors optimized for memory applications, including floating body devices, ferroelectric FETs (FeFETs), vertical TFTs for 3D arrays, and charge-trapping memory cells.
Development of memory cells utilizing resistive switching or phase-change materials, including novel material compositions, multi-layered structures, and integration with selector devices like bipolar junction transistors, to achieve non-volatile storage.
Novel materials and processes for forming low-resistance electrical contacts and interconnects within semiconductor devices, including selective deposition, silicidation, and barrier layers for improved performance and scaling.
Techniques and methodologies for fabricating semiconductor devices, including etching, deposition, annealing, isolation, and doping steps, aimed at improving yield, performance, or enabling new structures.
Focuses on the design and manufacturing of transistors where the gate material fully encircles the channel, often using nanosheets or fins, to improve electrostatic control and reduce short-channel effects.
Manufacturing processes and structural designs for transistors utilizing fin-shaped channels or multiple gates (e.g., FinFETs, Gate-All-Around FETs) to enhance gate control and reduce short-channel effects.
Methods and compositions for identifying, quantifying, or characterizing specific biological molecules (e.g., nucleic acids, proteins, metabolites, antibodies) or microbial species, often for diagnostic, prognostic, or quality control applications.
Structural innovations in individual transistors, such as fin-based field-effect transistors (FinFETs), 3D gate structures, or multi-layer active regions, aimed at improving performance or density.
Techniques for designing and fabricating the conductive pathways (interconnects) and their contacts between different components within an integrated circuit, focusing on density, reliability, and performance.
Advanced techniques for forming and optimizing gate dielectrics, work function layers, and other dielectric layers within transistor structures to improve performance, reliability, and scaling.
Techniques for forming electrical contacts, vias, and interconnects to semiconductor devices, including advanced methods like contact-over-active-gate (COAG) and backside contacts for improved density and performance.
Miniaturized devices that manipulate small volumes of fluids (nanoliters to picoliters) through microchannels to perform laboratory functions like mixing, separation, reaction, and detection on a single chip.
Self-contained or modular devices designed to automate and integrate multiple steps of molecular diagnostic assays, from sample preparation to result interpretation, often for point-of-care or high-throughput applications.
The design and manufacturing of integrated circuits that combine optical and electronic components, particularly for high-speed data communication between processors and memory.
Devices leveraging superconductivity or quantum phenomena for applications such as quantum computing, high-efficiency power transmission, or sensitive detection, including materials like graphene Josephson junctions and quantum bits.
Design and implementation of non-traditional logic gates or memory elements, often leveraging new materials or device physics to achieve multi-functionality, adaptive thresholds, or higher density.
Methods for temporarily attaching a wafer or substrate to a carrier for thinning, dicing, or other processing, followed by controlled debonding, often using light-sensitive resins, temporary adhesives, or roughened interfaces.
Techniques for precise material removal, pattern shaping, and controlling etch selectivity or uniformity, often involving plasma, wet chemistry, or directed beams to achieve desired features on semiconductor substrates.
Incorporation of novel semiconductor, dielectric, or metallic materials into transistor structures to achieve enhanced performance, new functionalities, or specific device characteristics.
Engineering of artificial subwavelength structures (meta-atoms) to create metasurfaces that manipulate light properties (phase, polarization, wavelength) for multi-functional optical devices.
Development of sophisticated optical lens assemblies and computational methods to achieve high-resolution, precise, or specialized imaging, often for medical or scientific applications.
Design and application of devices that are inserted into the body or implanted to treat diseases, modulate physiological functions, or repair anatomical structures.
Systems and components designed for precise, automated manipulation, transfer, and dispensing of liquid samples and reagents, often involving pipettes, robotic arms, and specialized sample containers.
Development and manufacturing of semiconductor devices using wide bandgap materials like Silicon Carbide (SiC) or Gallium Nitride (GaN) for high-power, high-frequency, or high-temperature applications.
Focuses on the design, fabrication, and application of piezoelectric materials and devices for sensing, actuation, or wave generation, including material properties, single crystal growth, and protective layers.
Layout, material composition, and structural arrangement of photoelectric conversion elements and associated circuitry within image sensor arrays, including infrared detectors and back-side illuminated structures.
Systems that employ imaging and image processing to automatically detect defects, verify states, or ensure quality control in manufactured goods, printed materials, or industrial processes.
Methods for depositing thin films with controlled conformality, thickness, and material properties, including selective deposition on specific areas, often using atomic layer deposition (ALD), chemical vapor deposition (CVD), or epitaxial growth.
Systems and methods that utilize optical fibers as sensing elements or for transmitting sensing signals, often for distributed monitoring of environmental conditions, phase changes, or integrating sensing with communication.
Systems and methods for automated substrate transport, precise positioning, temperature regulation, and chamber environment management to ensure process stability, uniformity, and yield in semiconductor manufacturing.
Development and use of engineered biological systems, such as organ-on-a-chip devices, dynamic hydrogels, or genetically modified cells, to mimic physiological conditions, study disease mechanisms, screen compounds, or develop cell-based therapies.
Integration of various sensor types (e.g., thermal, strain) or display components directly onto semiconductor substrates or within device architectures for compact and high-performance systems.
Systems and methods that use imaging technologies, computer vision, and augmented reality to provide real-time guidance, localization, and visualization during surgical procedures or for detailed anatomical assessment.
Integrated solutions for dissipating heat generated by high-density semiconductor devices within the package, including embedded cooling structures, cold plates, and optimized fluidic channels.
Design and operation of analog and mixed-signal circuits within the memory array, such as page buffers, sense amplifiers, and data latches, responsible for reading and writing data from/to memory cells.
Novel electrical connection methods within or between package components, including through-glass vias (TGVs), backside contacts, and optimized redistribution layers for improved signal and power integrity.
Devices and systems designed for the cultivation of cells or tissues, often incorporating three-dimensional structures or controlled interfaces to mimic in-vivo environments for biological research or production.
Hardware and control techniques for optimizing memory access latency, ensuring data integrity, and managing storage resources efficiently. This includes error correction, read/write voltage control, and intelligent data placement or in-memory computation.
Development of devices and methods for non-invasive or minimally invasive collection and analysis of physiological data, often from wearable sensors, to monitor health, activity, or specific conditions.
Apparatus and methods for precisely controlling temperature profiles (heating, cooling, incubation) within laboratory reaction vessels or modules to optimize biochemical processes like gene amplification or protein assays.
Patents
Showing 1-10 of 49
Integrated Circuit Interconnect & Layout Optimization