Company patents
Infineon Technologies AG
Infineon Technologies AG's patent strategy shows a surprising shift away from foundational semiconductor device structures, with Transistor & Device Structure experiencing a dramatic 68.3% decline in 2025 and no patents so far in 2026, despite its strong presence in Semiconductor Packaging & Encapsulation (18.6% of portfolio). While many categories show a general decline in 2026 (partial year data), the emergence of Semiconductor Diodes & Transistors with 85 patents in 2025, after no activity in 2023-2024, suggests a focused re-prioritization within specific semiconductor components.
Patent Trend by Technology Area
Yearly patent publications since 2023
Product themes
Product-level themes inferred from filings since 2023, with category chips showing where each theme appears. Select a theme to filter the patents below.
3,041 US filings (since 2023) · 12 categories · 49 themes
Techniques and methodologies for fabricating semiconductor devices, including etching, deposition, annealing, isolation, and doping steps, aimed at improving yield, performance, or enabling new structures.
Innovations in the physical components and architectures of radar, lidar, and sonar systems, including antenna design, RF signal generation, beam steering mechanisms, and optical elements for improved performance.
Methods and devices that determine the position, angle, or distance of an object by detecting changes in magnetic fields or inductive coupling.
Novel materials and processes for forming low-resistance electrical contacts and interconnects within semiconductor devices, including selective deposition, silicidation, and barrier layers for improved performance and scaling.
Development and manufacturing of semiconductor devices using wide bandgap materials like Silicon Carbide (SiC) or Gallium Nitride (GaN) for high-power, high-frequency, or high-temperature applications.
Design and manufacturing techniques for microelectromechanical systems (MEMS) microphones, focusing on physical components like diaphragms, movable masses, and housing for improved performance, heat management, or fluid interaction.
Digital logic and control circuits for managing power delivery, driving various loads (e.g., inductive, display elements), converting power, and protecting against over-voltage or electrostatic discharge. Includes gate drivers for power FETs and voltage level shifters.
Advanced techniques for forming and optimizing gate dielectrics, work function layers, and other dielectric layers within transistor structures to improve performance, reliability, and scaling.
Techniques for stacking multiple semiconductor dies or active layers vertically to achieve higher density and shorter interconnections, often utilizing through-silicon vias (TSVs) or other vertical conductive paths like through-hole electrodes.
Design and implementation of capacitive sensors, including methods for improving accuracy, reducing power consumption, compensating for environmental variations (like temperature), and analyzing complex displacement interactions.
Techniques and apparatus for electrically testing semiconductor devices, integrated circuits, or wafers during manufacturing or post-assembly, including built-in self-test (BIST) and contact reliability assessment.
Devices and methods for accurately measuring or monitoring electrical current draw and power usage in various systems, often for control, optimization, or safety purposes.
Techniques for forming electrical contacts, vias, and interconnects to semiconductor devices, including advanced methods like contact-over-active-gate (COAG) and backside contacts for improved density and performance.
Combining different types of functional chiplets (e.g., compute, memory, I/O, optical, power, biological) into a single package or system, often to optimize performance, power, or cost by leveraging specialized components.
Methods and apparatus for measuring magnetic fields or utilizing magnetic resonance principles for medical diagnostics, material analysis, or precise localization, including gradient field measurement in MRI.
Circuits and techniques for generating, synchronizing, interpolating, and recovering high-frequency clock signals and high-speed data streams, often involving reduced propagation delay, multi-level signaling, and robust sampling mechanisms.
Techniques for combining data from disparate sensor types (e.g., cameras, radar, mobile device signals) to achieve a more robust and comprehensive understanding of an environment or subject, often leveraging machine learning for interpretation and correlation.
Focuses on the architectural and circuit-level innovations for Analog-to-Digital Converters (ADCs) and Digital-to-Analog Converters (DACs) to improve speed, accuracy, linearity, and power efficiency. Includes specific types like SAR and Delta-Sigma, and their constituent components.
Packaging technologies where bare dies are embedded within a mold compound or substrate cavity, and then interconnected using redistribution layers (RDLs) for fan-out or compact integration, often avoiding through-silicon vias in the chips themselves.
Integrated solutions for dissipating heat generated by high-density semiconductor devices within the package, including embedded cooling structures, cold plates, and optimized fluidic channels.
Materials and processes for hermetic encapsulation, conformal coating, optical chip sealing, and stretchable conductors for electronic and optoelectronic devices.
Methods and architectures for processing digital signals to enhance quality, remove noise, manage group delay, and facilitate symbol decision, often involving digital filters and equalization techniques.
Systems and methods designed to improve the accuracy, reliability, or operational range of sensors and electronic components by measuring temperature and applying corrections or adjustments.
Techniques and circuits designed to identify, compensate for, or correct non-linearities, offsets, and other imperfections in signal processing paths, particularly within analog-to-digital, digital-to-analog, or digital-to-time converters.
Development of novel materials and designs for bonding, sealing, and underfill applications, focusing on improving mechanical integrity, electrical performance, and preventing defects like cracks or delamination in chip-to-chip connections.
Methods and systems for identifying anomalies, failures, or impending issues within electric motors or their associated drive and power management circuits, often by monitoring electrical or operational parameters.
Methods for temporarily attaching a wafer or substrate to a carrier for thinning, dicing, or other processing, followed by controlled debonding, often using light-sensitive resins, temporary adhesives, or roughened interfaces.
Techniques and systems for precisely measuring electrical or electromagnetic properties of materials or components, often involving specialized resonators, waveguides, or multi-range measurement systems to ensure accuracy.
Incorporation of novel semiconductor, dielectric, or metallic materials into transistor structures to achieve enhanced performance, new functionalities, or specific device characteristics.
Integration of various sensor types (e.g., thermal, strain) or display components directly onto semiconductor substrates or within device architectures for compact and high-performance systems.
Focuses on the design and manufacturing of transistors where the gate material fully encircles the channel, often using nanosheets or fins, to improve electrostatic control and reduce short-channel effects.
Software, algorithms, and associated hardware for monitoring, controlling, and optimizing battery performance, safety, and lifespan, including charge/discharge cycles, thermal regulation, and system integration.
Development of encoding and decoding algorithms and apparatuses for robust data transmission and storage, focusing on techniques like LDPC, polar codes, and iterative decoding methods to minimize bit errors and improve communication reliability.
Design and operation of transistors optimized for memory applications, including floating body devices, ferroelectric FETs (FeFETs), vertical TFTs for 3D arrays, and charge-trapping memory cells.
Systems and methods for automated substrate transport, precise positioning, temperature regulation, and chamber environment management to ensure process stability, uniformity, and yield in semiconductor manufacturing.
Digital logic circuits designed to interface with analog sensors or signals, including comparators, input buffers, differential input stages, and logic for processing sensor outputs (e.g., capacitance, optical, touch) for detection or measurement.
Development and application of resin compositions, molding compounds, and underfill materials to protect semiconductor devices from environmental factors, moisture, mechanical stress, and for structural integrity.
Novel electrical connection methods within or between package components, including through-glass vias (TGVs), backside contacts, and optimized redistribution layers for improved signal and power integrity.
Integration of advanced functionalities into headphones, earphones, or hearing aids, such as multi-device connectivity, health monitoring sensors, custom fitting mechanisms, and intelligent audio switching or control.
Specialized digital and mixed-signal circuits for controlling and reading out quantum bits (qubits), including generating precise modulated RF signals and integrating with photonic components for quantum operations.
Methods and systems for accurately determining the absolute or relative position of an object or device, often integrating satellite navigation (GNSS), inertial measurement units (IMU), and local ranging or wireless communication technologies.
Engineering solutions for optimizing the acoustic performance and mechanical stability of loudspeakers, including diaphragm materials, spider geometries, vibration suppression, and integration into other devices.
Manufacturing processes and structural designs for transistors utilizing fin-shaped channels or multiple gates (e.g., FinFETs, Gate-All-Around FETs) to enhance gate control and reduce short-channel effects.
Signal processing techniques for multi-microphone systems to enhance desired audio signals and suppress noise or interference by spatially filtering sound sources, improving signal-to-noise ratio and channel separation.
Integration of optical sensors, particularly for biometrics or other surface interactions, beneath a display or protective cover, requiring specialized optical paths, illumination, and packaging.
Techniques used by sensing systems to identify the presence, location, and characteristics of objects or unusual conditions in an environment, including methods to suppress false positives or 'ghost' detections.
Methods for depositing thin films with controlled conformality, thickness, and material properties, including selective deposition on specific areas, often using atomic layer deposition (ALD), chemical vapor deposition (CVD), or epitaxial growth.
Methods and systems for efficiently reducing the size of digital data, often employing adaptive techniques, neural networks, or temporal modeling, to achieve high compression ratios while preserving data quality. Includes entropy coding.
Techniques for precise material removal, pattern shaping, and controlling etch selectivity or uniformity, often involving plasma, wet chemistry, or directed beams to achieve desired features on semiconductor substrates.
Patents
Showing 1-10 of 100
Multi-modal Sensor Fusion