Infineon Technologies Canada Inc.

An apparatus includes a controller. The controller is operative to determine a magnitude of first output current supplied from a first power converter to a dynamic load and determine a magnitude of second output current supplied from a second power converter to power the dynamic load. The controller controls a magnitude of the first output current with respect to a magnitude of the second content output current depending on a magnitude of total output current consumed by the dynamic load.

The biasing of one or more field plates of a high electron mobility transistor (a HEMT) with a non-zero voltage to thereby affect the electric field profile of the HEMT. The non-zero voltage may be a constant DC voltage, or perhaps may be a voltage that changes over time. The use of a non-zero voltage allows for greater ability to regulate and reduce the electric field occurring in the semiconductor channel region, especially at the field plate. Further, when the electric field occurring at the field plate is reduced, the overall size of the HEMT can also be reduced as compared to applying a zero voltage to the field plate. Alternatively, or in addition, applying a non-zero voltage to the field plate allows the voltage levels handled by the HEMT to be increased as compared to simply grounding the field plate.

A circuit that allows for accurate power transistor current sensing and electrostatic discharge protection. The circuit includes a power field-effect transistor and a sense field-effect transistor. The sense transistor current is proportional to (but much smaller than) the power transistor current. Thus, the power transistor current may be measured by measuring instead the sense transistor current. The gate nodes of the transistors are connected together, and the drain nodes of the transistors are connected together. However, the source nodes of the transistors are not directly connected to each other, and are instead connected together via a protective resistor. When the circuit is exposed to electrostatic discharge at the source of the sense transistor, the influx of charge that would have otherwise damaged the sense transistor is instead shared between both transistors via the protective resistor.

Desaturation protection for a power field-effect transistor. The desaturation protection circuit includes the power field-effect transistor and a sense field-effect transistor that each have threshold voltages that are approximately the same. The sense field-effect transistor shares a gate terminal with the power field-effect transistor and shares a drain terminal with the power field-effect transistor. The circuit also includes a comparator having a first input terminal connected to a source terminal of the sense field-effect transistor, and having a second input terminal connected to a voltage source that is an offset voltage below a supply voltage. The circuit also includes a pull-up network configured to cause the output of the comparator to represent a state of whether the sense field-effect transistor is on or off, and can directly drive the turning off of the power transistor.

Embedded die packaging for semiconductor power switching devices, wherein the package comprises a laminated body comprising a layer stack of a plurality of dielectric layers and conductive metal layers. A thermal contact area on a back-side of the die is attached to a leadframe. A patterned layer of conductive metallization on a front-side of the die provides electrical contact areas of the power semiconductor device. Before embedding, a protective dielectric layer is provided on the front-side of the die, extending around edges of the die. The protective dielectric layer provides a protective region that acts a cushion to protect edges of the die from damage during lamination. The protective dielectric material may extend over the electrical contact areas to protect against etch damage and damage during laser drilling of vias, thereby mitigating physical damage, overheating or other potential damage to the active region of the semiconductor device.

A circuit for providing an alternating signal to a switching node. The circuit includes three power transistors, two capacitors, and two gate drivers. The first and second transistors are connected in series, with the switching node connected therebetween. When the first transistor is on and the second transistor is off, a high voltage is provided to the switching node via the first transistor. When the first transistor is off and the second transistor is on, a low voltage is provided to the switching node via the second transistor. The transistors are controlled via the gate drivers. Charge is provided to the gate drivers via the capacitors. The capacitors are charged via an intermediate power source, with the third power transistor connected in diode configuration between the two capacitors. The circuit is capable of withstanding high voltage differences across the transistors, and may be implemented monolithically on a same epitaxial stack.

A voltage converter circuit including a primary side circuit including four transistors connected in series between two voltage application nodes, and two capacitors coupled in series between the two voltage application nodes. A flying capacitor is connected between first circuit node and a second circuit node, where the first circuit node is between the first and second transistors in the transistor series, and the second circuit node is between the third and fourth transistors in the transistor series. A primary side transformer is connected between a third circuit node and a fourth circuit node, where the third circuit node is between the second and third transistors in the transistor series, and the fourth circuit node is between the first and second capacitors in the capacitor series.

A bidirectional current sense circuit allowing for sensing of power current passing through a power field-effect transistor, regardless of the direction of the power current. The bidirectional current sense circuit outputs a current sense signal representing the power current onto a current sense output node. The bidirectional current sense circuit includes the power field-effect transistor, and two current sense circuits. One of the current sense circuits senses the power current when the power current flows in the positive direction. The other current sense circuit senses the power current when the power current flows in the negative direction.

A power transistor current sense circuit. The control nodes of each of a power transistor and sense transistors are connected. The input nodes of the power transistor and each of the sense transistors are also connected. A voltage divider is connected between a reference voltage source and the output node of a second sense transistor. A negative feedback circuit is connected between the output of the voltage divider and the output node of the first sense transistor. The negative feedback circuit forces a voltage at the output node of the first sense transistor to be approximately equal to the divided voltage. A power transistor current determination component measures a sense current that passes through the first sense transistor, and from that detects the current passing through the power transistor.

A circuit that is capable of generating a negative voltage on a negative voltage supply node. The circuit includes a negative voltage generation circuit, an oscillator and an oscillator control signal generator. The negative voltage generation circuit generates a negative voltage on the negative voltage supply node in response to receiving a signal from the oscillator. The negative voltage generated by the negative voltage generation circuit depends upon the frequency of the signal from the oscillator. The oscillator control signal generator controls the frequency of the signal from the oscillator by sensing the negative voltage present on the negative voltage supply node, and by increasing or decreasing the frequency of the signal from the oscillator accordingly. Thus, charge is replenished to the negative voltage supply node to more closely match the drawing of charge from that negative voltage supply node, thereby more accurately generating the negative voltage.