KunShan Go-Visionox Opto-Electronics Co., Ltd.

An array substrate and a display panel. The array substrate includes: a base layer including at least one base sub-layer each being a light-transmitting layer; a transistor layer on the base layer, the transistor layer including a plurality of transistors; and at least one light adjustment layer on a side of the transistor layer facing the base layer, the at least one light adjustment layer being configured to block, at least in a preset state, light from at least one side of the at least one light adjustment layer. In the array substrate, the amount of light irradiated on the transistor layer from the side of the base layer is reduced and the photo-induced leakage current in the transistors in the transistor layer is reduced, thus alleviating locally non-uniform brightness of a displayed image.

A light-transmitting display panel, display panel and display apparatus. The light-transmitting display panel includes a first pixel array including a first minimum repeating unit. The first minimum repeating unit includes at least one light-transmitting column unit. The at least one light-transmitting column unit has a central axis parallel to an extending direction of the at least one light-transmitting column unit. The at least one light-transmitting column unit includes a plurality of first sub-pixels spaced apart from one another in the extending direction of the at least one light-transmitting column unit. At least one of the first sub-pixels in the at least one light-transmitting column unit is set to deviate from the central axis.

An array base plate, a display panel and a display apparatus. The array base plate includes a display area and a non-display area arranged adjacently. The array base plate includes: a substrate; a semiconductor layer located on the substrate and including a plurality of semiconductor portions distributed in an array along a first direction and a second direction; and one or more electrostatic protection portions each including a connection end and a free end opposing to each other, the connection end being connected with at least one of the semiconductor portions, and the free end extending from the connection end to the non-display area. In the present application, the electrostatic protection performance of the array base plate can be effectively improved by arranging the electrostatic protection portions.

A thin film transistor array substrate, a display panel and a display device. The thin film transistor array substrate includes a semiconductor layer, a gate layer and a source-drain layer arranged in a stacked manner, two insulating layers respectively located between the semiconductor layer and the gate layer and between the gate layer and the source-drain layer, the semiconductor layer comprises a source region, a drain region and a channel region located between the source region and the drain region, the channel region is doped with a p-type impurity, a molecular weight of the p-type impurity in the channel region is equal to or greater than 25, a range of a doping depth of the p-type impurity in the channel region is 1 nm to 20 nm.

A pixel arrangement structure, a display panel and a display apparatus. First sub-pixels of the pixel arrangement have centers coincident with vertexes of a first virtual quadrilateral, a second sub-pixel and a third sub-pixel are located in the first virtual quadrilateral, and the second sub-pixel has a larger opening area than the first sub-pixel and the second sub-pixel.

The present application relates to a pixel arrangement structure, including first sub-pixels, second sub-pixels, third sub-pixels, and fourth sub-pixels. Centers of two of the first sub-pixels arranged opposite to each other and centers of two of the second sub-pixels arranged opposite to each other are taken as vertices and are connected to form a virtual quadrilateral. The virtual quadrilateral includes two equal sides arranged opposite to each other, a short side and a long side arranged opposite to each other and connected to vertices of the equal sides. The short side of the virtual quadrilateral is not parallel to the long side of the virtual quadrilateral. One of the third sub-pixels or one of the fourth sub-pixels is arranged in the virtual quadrilateral, and the third sub-pixel and the fourth sub-pixel emits light in a same color.

The present application relates to a pixel arrangement structure, comprising a plurality of first pixel units and a plurality of second pixel units. The plurality of first pixel units and the plurality of second pixel units are alternately arranged in a first direction and a second direction. The first pixel units and the second pixel units respectively comprises a first sub-pixel, a second sub-pixel, a third sub-pixel, and a fourth sub-pixel. The first sub-pixel is located at one side of an imaginary connecting line between a center of the third sub-pixel and a center of the fourth sub-pixel, and the second sub-pixel is located at another side of the imaginary connecting line between the center of the third sub-pixel and the center of the fourth sub-pixel. After the second pixel units are rotated by a predetermined angle, sub-pixel arrangement structures thereof are mirror-symmetrical to that of the first pixel units.

A display panel includes two first sub-pixels and two second sub-pixels which are connected as a first virtual quadrilateral. Each of the two first sub-pixels includes a first subordinate sub-pixel and a second subordinate sub-pixel facing to each other and spaced apart from each other. One of two first vertices of the first virtual quadrilateral being located between the first subordinate sub-pixel and the second subordinate sub-pixel of one of the two first sub-pixels, the other one of the two first vertices being located between the first subordinate sub-pixel and the second subordinate sub-pixel of another one of the two first sub-pixels. Two second sub-pixels are respectively located at two second vertices of the first virtual quadrilateral. The two first vertices and the two second vertices are alternately arranged and spaced apart from each other. The display panel includes a third sub-pixel located within the first virtual quadrilateral.

Provided in the present application are a display panel and a display apparatus. The display panel includes a substrate, a first potential portion, an isolation structure, a light-emitting functional layer and a first conductive portion. The first potential portion is arranged on a side of the substrate, the isolation structure is arranged on a side of the first potential portion that faces away from the substrate, the isolation structure is provided with a first through hole extending through the isolation structure in a thickness direction of the substrate, and the first potential portion is at least partially exposed in the first through hole. The light-emitting functional layer is arranged on the side of the first potential portion that faces away from the substrate, the light-emitting functional layer includes a plurality of light-emitting structures, and adjacent light-emitting structures are isolated from each other by means of the isolation structure.

An array substrate and a display panel, which relate to the technical field of flexible displays and are used for solving the problem of the Newton's ring phenomenon due to unequal spacing between transparent layers affects the display effect of the display panel. The array substrate or a display panel include at least two transparent layers stacked in sequence, and a light adjusting layer arranged between at least two adjacent transparent layers, where a product of a refractive index of the light adjusting layer and a thickness of the light adjusting layer is greater than one half of a preset wave train length.