Company patents
KWANSEI GAKUIN EDUCATIONAL FOUNDATION
KWANSEI GAKUIN EDUCATIONAL FOUNDATION's patent strategy reveals a surprising and strong focus on Semiconductor Manufacturing Process, accounting for 47.9% of its portfolio, with significant growth of 120.0% in 2024 and 36.4% in 2025, despite a sharp decline so far in 2026. Concurrently, the foundation appears to be shifting priorities away from Acyclic / Cyclic Compounds (Other Elements) and Functional Materials (LCD, Lubricants), both experiencing consistent year-over-year declines of over 30% since 2024 and showing no patent activity so far in 2026.
Patent Trend by Technology Area
Yearly patent publications since 2023
Product themes
Product-level themes inferred from filings since 2023, with category chips showing where each theme appears. Select a theme to filter the patents below.
71 US filings (since 2023) · 12 categories · 12 themes
Techniques and methodologies for fabricating semiconductor devices, including etching, deposition, annealing, isolation, and doping steps, aimed at improving yield, performance, or enabling new structures.
Development and optimization of organic chemical compounds and their structures, including guest-host systems and metal complexes, used within the emission layer to achieve specific light emission characteristics such as color, efficiency, and operational lifetime.
Development and manufacturing of semiconductor devices using wide bandgap materials like Silicon Carbide (SiC) or Gallium Nitride (GaN) for high-power, high-frequency, or high-temperature applications.
Methods for depositing thin films with controlled conformality, thickness, and material properties, including selective deposition on specific areas, often using atomic layer deposition (ALD), chemical vapor deposition (CVD), or epitaxial growth.
Systems and methods for automated substrate transport, precise positioning, temperature regulation, and chamber environment management to ensure process stability, uniformity, and yield in semiconductor manufacturing.
Advanced techniques for forming and optimizing gate dielectrics, work function layers, and other dielectric layers within transistor structures to improve performance, reliability, and scaling.
Methods and compositions for identifying, quantifying, or characterizing specific biological molecules (e.g., nucleic acids, proteins, metabolites, antibodies) or microbial species, often for diagnostic, prognostic, or quality control applications.
Techniques for precise material removal, pattern shaping, and controlling etch selectivity or uniformity, often involving plasma, wet chemistry, or directed beams to achieve desired features on semiconductor substrates.
Processes involving chemical and mechanical forces to planarize surfaces (CMP) or wet chemical treatments for cleaning, etching, or material removal, often utilizing specialized compositions, nozzles, or fluid management systems.
Inspection and testing methods specifically designed for wafers before, during, or after bonding processes, including verification of bonding surfaces, alignment, and defect detection in multi-wafer or stacked die assemblies.
Integrated solutions for dissipating heat generated by high-density semiconductor devices within the package, including embedded cooling structures, cold plates, and optimized fluidic channels.
Methods for temporarily attaching a wafer or substrate to a carrier for thinning, dicing, or other processing, followed by controlled debonding, often using light-sensitive resins, temporary adhesives, or roughened interfaces.
Patents
Showing 1-10 of 110