Company patents
LAPIS Semiconductor Co., Ltd.
LAPIS Semiconductor Co., Ltd. appears to be significantly shifting its patent strategy, with a notable decline in filings across almost all categories in 2025, including a complete cessation in Display Drivers, Transistor & Device Structure, and Pulse / Digital Logic Circuits, each declining by 100% YoY. While Semiconductor Packaging & Encapsulation remains its largest category at 29.5% of its portfolio, its 2025 filings also saw a substantial drop of 33.3% YoY, indicating a broad re-evaluation of its R&D focus.
Patent Trend by Technology Area
Yearly patent publications since 2023
Product themes
Product-level themes inferred from filings since 2023, with category chips showing where each theme appears. Select a theme to filter the patents below.
78 US filings (since 2023) · 12 categories · 20 themes
Techniques and methodologies for fabricating semiconductor devices, including etching, deposition, annealing, isolation, and doping steps, aimed at improving yield, performance, or enabling new structures.
Novel materials and processes for forming low-resistance electrical contacts and interconnects within semiconductor devices, including selective deposition, silicidation, and barrier layers for improved performance and scaling.
Methods and circuits for coordinating the timing of display signals, data transmission, and control signals across various display components, ensuring proper image rendering and efficient operation.
Design and implementation of circuits and layouts for driving individual pixels or rows/columns of pixels, including gate drivers, data drivers, pixel driving circuits, and their integration onto the display substrate, often in non-display regions.
Development of novel materials and designs for bonding, sealing, and underfill applications, focusing on improving mechanical integrity, electrical performance, and preventing defects like cracks or delamination in chip-to-chip connections.
Algorithms and hardware implementations within display drivers or associated components to enhance visual quality, resolution, or color reproduction, including upscaling, dithering, and compensation for display artifacts like crosstalk.
Circuits and techniques for generating, synchronizing, interpolating, and recovering high-frequency clock signals and high-speed data streams, often involving reduced propagation delay, multi-level signaling, and robust sampling mechanisms.
Development and application of resin compositions, molding compounds, and underfill materials to protect semiconductor devices from environmental factors, moisture, mechanical stress, and for structural integrity.
Software, algorithms, and associated hardware for monitoring, controlling, and optimizing battery performance, safety, and lifespan, including charge/discharge cycles, thermal regulation, and system integration.
Advanced techniques for forming and optimizing gate dielectrics, work function layers, and other dielectric layers within transistor structures to improve performance, reliability, and scaling.
Techniques for stacking multiple semiconductor dies or active layers vertically to achieve higher density and shorter interconnections, often utilizing through-silicon vias (TSVs) or other vertical conductive paths like through-hole electrodes.
Techniques and circuits for optimizing power consumption, voltage stability, and energy efficiency in display panels, often involving dynamic voltage scaling, duty cycle control, or remnant voltage management.
Manufacturing processes and structural designs for transistors utilizing fin-shaped channels or multiple gates (e.g., FinFETs, Gate-All-Around FETs) to enhance gate control and reduce short-channel effects.
Processes and apparatus for disassembling spent batteries and recovering valuable materials (e.g., metals, electrolytes, plastics) through mechanical, chemical, or electrochemical methods for reuse or sustainable disposal.
Processes involving chemical and mechanical forces to planarize surfaces (CMP) or wet chemical treatments for cleaning, etching, or material removal, often utilizing specialized compositions, nozzles, or fluid management systems.
Systems and methods for automated substrate transport, precise positioning, temperature regulation, and chamber environment management to ensure process stability, uniformity, and yield in semiconductor manufacturing.
Layout, material composition, and structural arrangement of photoelectric conversion elements and associated circuitry within image sensor arrays, including infrared detectors and back-side illuminated structures.
Specialized digital and mixed-signal circuits for controlling and reading out quantum bits (qubits), including generating precise modulated RF signals and integrating with photonic components for quantum operations.
Devices and methods for accurately measuring or monitoring electrical current draw and power usage in various systems, often for control, optimization, or safety purposes.
Focuses on the structural integrity, housing, mounting, and physical integration of battery cells into robust and protected packs within electric vehicles, including manufacturing considerations.
Patents
Showing 1-10 of 31
Advanced Metallization & Contacts