Company patents
MACOM Technology Solutions Holdings, Inc.
Macom Technology Solutions Holdings Inc. shows a surprising shift in its patent strategy, with a significant decline across nearly all top categories in 2025 and so far in 2026, following a surge in 2024. For instance, 'Transistor & Device Structure' saw a dramatic 300.0% YoY growth in 2024 but then plummeted by 84.4% in 2025 and 100.0% so far in 2026, indicating a rapid deprioritization of this area despite its earlier focus.
Patent Trend by Technology Area
Yearly patent publications since 2023
Product themes
Product-level themes inferred from filings since 2023, with category chips showing where each theme appears. Select a theme to filter the patents below.
318 US filings (since 2023) · 12 categories · 43 themes
Circuit designs and control techniques focused on maximizing the power conversion efficiency of amplifiers, especially for radio frequency (RF) or audio applications, often involving load modulation, envelope tracking, or specific amplifier classes (e.g., Class-D, Doherty).
Amplifier designs that allow for dynamic adjustment of their operating characteristics, such as gain, impedance, or amplification path, based on control signals, input conditions, or desired performance modes.
Development and manufacturing of semiconductor devices using wide bandgap materials like Silicon Carbide (SiC) or Gallium Nitride (GaN) for high-power, high-frequency, or high-temperature applications.
Methods and circuits to detect and compensate for various imperfections in amplifier operation, such as DC offset, gain errors, phase errors, duty-cycle errors, or input error components, to improve accuracy and signal integrity.
Specialized amplifier types designed for converting current to voltage (transimpedance) or voltage to current (transconductance), often featuring virtual ground configurations, precise gain setting, and compensation for input/output characteristics.
Structural innovations in individual transistors, such as fin-based field-effect transistors (FinFETs), 3D gate structures, or multi-layer active regions, aimed at improving performance or density.
Incorporation of novel semiconductor, dielectric, or metallic materials into transistor structures to achieve enhanced performance, new functionalities, or specific device characteristics.
Techniques and methodologies for fabricating semiconductor devices, including etching, deposition, annealing, isolation, and doping steps, aimed at improving yield, performance, or enabling new structures.
Advanced techniques for forming and optimizing gate dielectrics, work function layers, and other dielectric layers within transistor structures to improve performance, reliability, and scaling.
Focuses on the design and manufacturing of transistors where the gate material fully encircles the channel, often using nanosheets or fins, to improve electrostatic control and reduce short-channel effects.
Novel materials and processes for forming low-resistance electrical contacts and interconnects within semiconductor devices, including selective deposition, silicidation, and barrier layers for improved performance and scaling.
Design and integration of lasers and associated components specifically for transmitting data over optical fibers or through free space, including modulation schemes and efficient light coupling.
Circuitry and techniques specifically designed to amplify weak signals while minimizing the introduction of additional noise and maintaining high linearity, often incorporating impedance matching, parasitic neutralization, or protection circuits.
Methods and structures for encapsulating, interconnecting, and integrating impedance network components, particularly acoustic filters, into larger modules or systems.
Circuits designed to transform the impedance of a source to match the impedance of a load, maximizing power transfer or minimizing signal reflections, often involving inductors, capacitors, and transformers.
Techniques for manufacturing semiconductor laser chips, including active region design, mirror structures, current and optical confinement, and the integration of multiple layers or elements on a substrate.
Techniques for stacking multiple semiconductor dies or active layers vertically to achieve higher density and shorter interconnections, often utilizing through-silicon vias (TSVs) or other vertical conductive paths like through-hole electrodes.
The design and manufacturing of integrated circuits that combine optical and electronic components, particularly for high-speed data communication between processors and memory.
Packaging technologies where bare dies are embedded within a mold compound or substrate cavity, and then interconnected using redistribution layers (RDLs) for fan-out or compact integration, often avoiding through-silicon vias in the chips themselves.
Methods and structures for assembling laser chips into functional modules, encompassing optical alignment, electrical interconnection, mechanical support, thermal management, and encapsulation for protection.
Techniques for designing and fabricating the conductive pathways (interconnects) and their contacts between different components within an integrated circuit, focusing on density, reliability, and performance.
Systems and methods that utilize optical fibers as sensing elements or for transmitting sensing signals, often for distributed monitoring of environmental conditions, phase changes, or integrating sensing with communication.
Circuits and techniques for generating, synchronizing, interpolating, and recovering high-frequency clock signals and high-speed data streams, often involving reduced propagation delay, multi-level signaling, and robust sampling mechanisms.
Devices utilizing piezoelectric materials to generate and filter acoustic waves, often for radio frequency applications, including surface acoustic wave (SAW) and bulk acoustic wave (BAW) structures.
Design and implementation of non-traditional logic gates or memory elements, often leveraging new materials or device physics to achieve multi-functionality, adaptive thresholds, or higher density.
Novel electrical connection methods within or between package components, including through-glass vias (TGVs), backside contacts, and optimized redistribution layers for improved signal and power integrity.
Digital logic and control circuits for managing power delivery, driving various loads (e.g., inductive, display elements), converting power, and protecting against over-voltage or electrostatic discharge. Includes gate drivers for power FETs and voltage level shifters.
Systems and components related to fiber lasers and fiber optical amplifiers, including doped fibers, pump schemes, and specialized fiber structures for gain, filtering, or thermal management.
Techniques for forming electrical contacts, vias, and interconnects to semiconductor devices, including advanced methods like contact-over-active-gate (COAG) and backside contacts for improved density and performance.
Digital logic circuits designed to interface with analog sensors or signals, including comparators, input buffers, differential input stages, and logic for processing sensor outputs (e.g., capacitance, optical, touch) for detection or measurement.
Manufacturing processes and structural designs for transistors utilizing fin-shaped channels or multiple gates (e.g., FinFETs, Gate-All-Around FETs) to enhance gate control and reduce short-channel effects.
Combining different types of functional chiplets (e.g., compute, memory, I/O, optical, power, biological) into a single package or system, often to optimize performance, power, or cost by leveraging specialized components.
Development and application of resin compositions, molding compounds, and underfill materials to protect semiconductor devices from environmental factors, moisture, mechanical stress, and for structural integrity.
Materials and processes for hermetic encapsulation, conformal coating, optical chip sealing, and stretchable conductors for electronic and optoelectronic devices.
Specialized digital and mixed-signal circuits for controlling and reading out quantum bits (qubits), including generating precise modulated RF signals and integrating with photonic components for quantum operations.
Development of novel materials and designs for bonding, sealing, and underfill applications, focusing on improving mechanical integrity, electrical performance, and preventing defects like cracks or delamination in chip-to-chip connections.
Methods for temporarily attaching a wafer or substrate to a carrier for thinning, dicing, or other processing, followed by controlled debonding, often using light-sensitive resins, temporary adhesives, or roughened interfaces.
Systems and methods for automated substrate transport, precise positioning, temperature regulation, and chamber environment management to ensure process stability, uniformity, and yield in semiconductor manufacturing.
Engineering of artificial subwavelength structures (meta-atoms) to create metasurfaces that manipulate light properties (phase, polarization, wavelength) for multi-functional optical devices.
Development of sophisticated optical lens assemblies and computational methods to achieve high-resolution, precise, or specialized imaging, often for medical or scientific applications.
Techniques and systems for ensuring the safe and precise operation of lasers, including power regulation, hazard detection, and deconfliction mechanisms in complex or dynamic environments.
Mechanisms and designs for actively changing or stabilizing the output wavelength, frequency, or spectral properties of a laser, often involving integrated optical filters, resonators, or pump adjustments.
Integrated solutions for dissipating heat generated by high-density semiconductor devices within the package, including embedded cooling structures, cold plates, and optimized fluidic channels.
Patents
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Encapsulation Materials & Processes