Company patents
MIRISE Technologies Corporation
MIRISE Technologies Corporation's patent strategy reveals a surprising shift away from core semiconductor device structures, with Transistor & Device Structure patents declining by 100.0% so far in 2026 after a 65.4% drop in 2025, while an emerging focus on Semiconductor Diodes & Transistors is evident, accounting for 12.4% of their portfolio and seeing 33 patents in 2025 from zero in prior years.
Patent Trend by Technology Area
Yearly patent publications since 2023
Product themes
Product-level themes inferred from filings since 2023, with category chips showing where each theme appears. Select a theme to filter the patents below.
426 US filings (since 2023) · 12 categories · 31 themes
Techniques and methodologies for fabricating semiconductor devices, including etching, deposition, annealing, isolation, and doping steps, aimed at improving yield, performance, or enabling new structures.
Novel materials and processes for forming low-resistance electrical contacts and interconnects within semiconductor devices, including selective deposition, silicidation, and barrier layers for improved performance and scaling.
Advanced techniques for forming and optimizing gate dielectrics, work function layers, and other dielectric layers within transistor structures to improve performance, reliability, and scaling.
Techniques and apparatus for electrically testing semiconductor devices, integrated circuits, or wafers during manufacturing or post-assembly, including built-in self-test (BIST) and contact reliability assessment.
Techniques for stacking multiple semiconductor dies or active layers vertically to achieve higher density and shorter interconnections, often utilizing through-silicon vias (TSVs) or other vertical conductive paths like through-hole electrodes.
Development and manufacturing of semiconductor devices using wide bandgap materials like Silicon Carbide (SiC) or Gallium Nitride (GaN) for high-power, high-frequency, or high-temperature applications.
Incorporation of novel semiconductor, dielectric, or metallic materials into transistor structures to achieve enhanced performance, new functionalities, or specific device characteristics.
Innovations in the physical components and architectures of radar, lidar, and sonar systems, including antenna design, RF signal generation, beam steering mechanisms, and optical elements for improved performance.
Manufacturing processes and structural designs for transistors utilizing fin-shaped channels or multiple gates (e.g., FinFETs, Gate-All-Around FETs) to enhance gate control and reduce short-channel effects.
Devices and methods for accurately measuring or monitoring electrical current draw and power usage in various systems, often for control, optimization, or safety purposes.
Focuses on the design and manufacturing of transistors where the gate material fully encircles the channel, often using nanosheets or fins, to improve electrostatic control and reduce short-channel effects.
Methods and apparatus for detecting objects and determining their three-dimensional position and orientation (pose) using imagery or point cloud data, often for navigation, surveying, or environmental understanding.
Development of novel materials and designs for bonding, sealing, and underfill applications, focusing on improving mechanical integrity, electrical performance, and preventing defects like cracks or delamination in chip-to-chip connections.
Integrated solutions for dissipating heat generated by high-density semiconductor devices within the package, including embedded cooling structures, cold plates, and optimized fluidic channels.
Systems utilizing various sensors (e.g., cameras, radar, sonar) to perceive the vehicle's surrounding environment, detect objects, and process/display relevant information to the driver for enhanced awareness, assistance in maneuvers, or safety.
Systems and methods for automated substrate transport, precise positioning, temperature regulation, and chamber environment management to ensure process stability, uniformity, and yield in semiconductor manufacturing.
Focuses on novel circuit configurations for DC-DC, DC-AC, or AC-DC conversion, often involving resonant operation, multi-level structures, or switched capacitors to improve efficiency, power density, or voltage conversion ratios.
Digital logic and control circuits for managing power delivery, driving various loads (e.g., inductive, display elements), converting power, and protecting against over-voltage or electrostatic discharge. Includes gate drivers for power FETs and voltage level shifters.
Design and operation of transistors optimized for memory applications, including floating body devices, ferroelectric FETs (FeFETs), vertical TFTs for 3D arrays, and charge-trapping memory cells.
Integration of various sensor types (e.g., thermal, strain) or display components directly onto semiconductor substrates or within device architectures for compact and high-performance systems.
Methods and systems for accurately determining the absolute or relative position of an object or device, often integrating satellite navigation (GNSS), inertial measurement units (IMU), and local ranging or wireless communication technologies.
Development and application of resin compositions, molding compounds, and underfill materials to protect semiconductor devices from environmental factors, moisture, mechanical stress, and for structural integrity.
Methods for depositing thin films with controlled conformality, thickness, and material properties, including selective deposition on specific areas, often using atomic layer deposition (ALD), chemical vapor deposition (CVD), or epitaxial growth.
Software, algorithms, and associated hardware for monitoring, controlling, and optimizing battery performance, safety, and lifespan, including charge/discharge cycles, thermal regulation, and system integration.
Circuits and techniques for generating, synchronizing, interpolating, and recovering high-frequency clock signals and high-speed data streams, often involving reduced propagation delay, multi-level signaling, and robust sampling mechanisms.
Methods for temporarily attaching a wafer or substrate to a carrier for thinning, dicing, or other processing, followed by controlled debonding, often using light-sensitive resins, temporary adhesives, or roughened interfaces.
Integration and processing of data from diverse sensors (e.g., magnetometers, odometers, IMUs, vision sensors) to achieve robust and accurate positioning, especially in environments where GPS is unreliable or unavailable.
Techniques for forming electrical contacts, vias, and interconnects to semiconductor devices, including advanced methods like contact-over-active-gate (COAG) and backside contacts for improved density and performance.
Techniques and circuits designed to regulate output, manage input variations, mitigate resonance, or ensure stable operation of power converters under diverse load and source conditions. This includes adaptive, predictive, or fault-tolerant control schemes.
Techniques used by sensing systems to identify the presence, location, and characteristics of objects or unusual conditions in an environment, including methods to suppress false positives or 'ghost' detections.
Integration of power converters with energy storage devices (batteries, supercapacitors) or grid interfaces, often involving AC/DC conversion, power flow management, and fault handling for hybrid power systems or specific applications like EVs or PV.
Patents
Showing 1-10 of 478