Company patents
Nexperia B.V.
Nexperia B.V.'s patent strategy reveals a strong, consistent focus on core semiconductor manufacturing, with Semiconductor Manufacturing Process (35.0% of portfolio) and Semiconductor Packaging & Encapsulation (27.7%) being dominant. While most categories show a significant drop in patenting activity so far in 2026, the emergence of Semiconductor Diodes & Transistors in 2025 with 32 patents, followed by 17 so far in 2026, indicates a recent, focused expansion into specific device types, contrasting with the general decline in other areas like Transistor & Device Structure, which saw a sharp 88.2% decline in 2025.
Patent Trend by Technology Area
Yearly patent publications since 2023
Product themes
Product-level themes inferred from filings since 2023, with category chips showing where each theme appears. Select a theme to filter the patents below.
311 US filings (since 2023) · 12 categories · 34 themes
Techniques and methodologies for fabricating semiconductor devices, including etching, deposition, annealing, isolation, and doping steps, aimed at improving yield, performance, or enabling new structures.
Novel materials and processes for forming low-resistance electrical contacts and interconnects within semiconductor devices, including selective deposition, silicidation, and barrier layers for improved performance and scaling.
Advanced techniques for forming and optimizing gate dielectrics, work function layers, and other dielectric layers within transistor structures to improve performance, reliability, and scaling.
Techniques for stacking multiple semiconductor dies or active layers vertically to achieve higher density and shorter interconnections, often utilizing through-silicon vias (TSVs) or other vertical conductive paths like through-hole electrodes.
Methods and structures for integrating and enclosing electronic components into compact, multi-functional modules, often involving embedded components, multi-layer substrates, and electromagnetic shielding for performance and miniaturization.
Focuses on the design and manufacturing of transistors where the gate material fully encircles the channel, often using nanosheets or fins, to improve electrostatic control and reduce short-channel effects.
Digital logic and control circuits for managing power delivery, driving various loads (e.g., inductive, display elements), converting power, and protecting against over-voltage or electrostatic discharge. Includes gate drivers for power FETs and voltage level shifters.
Development and manufacturing of semiconductor devices using wide bandgap materials like Silicon Carbide (SiC) or Gallium Nitride (GaN) for high-power, high-frequency, or high-temperature applications.
Development of novel materials and designs for bonding, sealing, and underfill applications, focusing on improving mechanical integrity, electrical performance, and preventing defects like cracks or delamination in chip-to-chip connections.
Specialized circuits and devices designed to protect electrical and electronic systems from transient overvoltages caused by electrostatic discharge (ESD) or power surges, often involving suppressor diodes, gas discharge tubes (GDTs), or voltage clamping mechanisms.
Manufacturing processes and structural designs for transistors utilizing fin-shaped channels or multiple gates (e.g., FinFETs, Gate-All-Around FETs) to enhance gate control and reduce short-channel effects.
Focuses on novel circuit configurations for DC-DC, DC-AC, or AC-DC conversion, often involving resonant operation, multi-level structures, or switched capacitors to improve efficiency, power density, or voltage conversion ratios.
Packaging technologies where bare dies are embedded within a mold compound or substrate cavity, and then interconnected using redistribution layers (RDLs) for fan-out or compact integration, often avoiding through-silicon vias in the chips themselves.
Techniques and circuits designed to regulate output, manage input variations, mitigate resonance, or ensure stable operation of power converters under diverse load and source conditions. This includes adaptive, predictive, or fault-tolerant control schemes.
Methods for temporarily attaching a wafer or substrate to a carrier for thinning, dicing, or other processing, followed by controlled debonding, often using light-sensitive resins, temporary adhesives, or roughened interfaces.
Techniques for forming electrical contacts, vias, and interconnects to semiconductor devices, including advanced methods like contact-over-active-gate (COAG) and backside contacts for improved density and performance.
Materials and processes for hermetic encapsulation, conformal coating, optical chip sealing, and stretchable conductors for electronic and optoelectronic devices.
Systems and methods for automated substrate transport, precise positioning, temperature regulation, and chamber environment management to ensure process stability, uniformity, and yield in semiconductor manufacturing.
Integrated solutions for dissipating heat generated by high-density semiconductor devices within the package, including embedded cooling structures, cold plates, and optimized fluidic channels.
Design and implementation of non-traditional logic gates or memory elements, often leveraging new materials or device physics to achieve multi-functionality, adaptive thresholds, or higher density.
Development and application of resin compositions, molding compounds, and underfill materials to protect semiconductor devices from environmental factors, moisture, mechanical stress, and for structural integrity.
Techniques and circuits for accurately identifying various electrical faults, such as ground faults, overcurrent, short circuits, switch malfunctions, or electrostatic discharge (ESD) events, often utilizing sensors, signal processing, and diagnostic algorithms.
Design and operation of transistors optimized for memory applications, including floating body devices, ferroelectric FETs (FeFETs), vertical TFTs for 3D arrays, and charge-trapping memory cells.
Design and assembly of power conversion, distribution, and protection modules, focusing on compact form factors, efficient electrical connections, and robust protective measures for electronic systems, often in high-power applications.
Novel electrical connection methods within or between package components, including through-glass vias (TGVs), backside contacts, and optimized redistribution layers for improved signal and power integrity.
Integration of power converters with energy storage devices (batteries, supercapacitors) or grid interfaces, often involving AC/DC conversion, power flow management, and fault handling for hybrid power systems or specific applications like EVs or PV.
Incorporation of novel semiconductor, dielectric, or metallic materials into transistor structures to achieve enhanced performance, new functionalities, or specific device characteristics.
Circuit breaker designs that combine mechanical switches with power semiconductors or solely use solid-state components to achieve faster fault interruption, current limiting, and arc suppression in AC or DC power systems.
Systems and methods for transferring electrical energy without physical contact, often utilizing inductive or resonant coupling, including antenna design, resonance tracking, and control mechanisms for efficient power delivery.
Circuits and techniques for generating, synchronizing, interpolating, and recovering high-frequency clock signals and high-speed data streams, often involving reduced propagation delay, multi-level signaling, and robust sampling mechanisms.
Intelligent control systems that manage the connection and disconnection of power, including pre-charging capacitive loads, reclosing after faults, or isolating parts of a grid based on detected conditions, often involving smart switches and relays with adaptive logic.
Digital logic circuits designed to interface with analog sensors or signals, including comparators, input buffers, differential input stages, and logic for processing sensor outputs (e.g., capacitance, optical, touch) for detection or measurement.
Systems that incorporate solar panels as a primary or auxiliary power source for various applications, including visual displays, remote devices, and portable battery charging, often emphasizing efficiency and adaptability.
Software, algorithms, and associated hardware for monitoring, controlling, and optimizing battery performance, safety, and lifespan, including charge/discharge cycles, thermal regulation, and system integration.
Patents
Showing 1-10 of 59
3D Die Stacking & Vertical Interconnects