ORIGIN QUANTUM COMPUTING TECHNOLOGY (HEFEI) CO., LTD

The present disclosure discloses a method and apparatus for optimizing a qubit control signal, and a quantum computer. The method includes: obtaining an operating frequency of a qubit based on a Ramsey experiment; obtaining a detuning amount of a frequency of the qubit control signal based on an amplified phase error (APE) experiment, where the APE experiment is an experiment that measures a change in quantum state information of the qubit with a preset detuning amount of the frequency of the qubit control signal; and optimizing the qubit control signal based on the detuning amount of the frequency.

Disclosed are a carrier transport simulation method, a carrier transport simulation apparatus, a medium, and an electronic device. A physical simulation model, and an initial condition and/or a boundary condition for carrier transport in a semiconductor device are determined; a mathematical physical equation correspondingly for solving the physical simulation model is determined; and a carrier density in the semiconductor device is determined based on the initial condition and/or the boundary condition, and the mathematical physical equation, to implement a simulation of carrier transport in the semiconductor device, so as to implement a simulation of carrier transport in a semiconductor device.

Disclosed are a clock synchronization apparatus, a clock synchronization method, a quantum measurement and control system, and a quantum computer. The clock synchronization apparatus includes a benchmark clock, a first clock generator, function boards, and second clock generators. The first clock generator is in a communication connection to the second clock generators, and one corresponding second clock generator is disposed on each of the function boards. The benchmark clock provides a first benchmark clock signal to the first clock generator providing a synchronization signal used to synchronize output clocks of all the second clock generators to the second clock generators based on the first benchmark clock signal. The second clock generators output, based on the synchronization signal, a work clock signal required by the function boards. The plurality of function boards generate, based on the work clock signal, a first signal required to perform corresponding work by using qubits.

The present disclosure discloses a method and apparatus for optimizing a qubit control signal, and a quantum computer. The method includes: obtaining an operating frequency of a qubit based on a Ramsey experiment; obtaining a detuning amount of a frequency of the qubit control signal based on an amplified phase error (APE) experiment, where the APE experiment is an experiment that measures a change in quantum state information of the qubit with a preset detuning amount of the frequency of the qubit control signal; and optimizing the qubit control signal based on the detuning amount of the frequency.

Disclosed are a quantum circuit compilation methods, devices, compilation frameworks and a quantum operating system. An example method determines a topological structure of a target quantum chip and a supportable logic gate set according to a configuration file in the compilation instruction; invoking the circuit processing module to process a to-be-complied circuit so as to generate a first supportable circuit; invoking the topological mapping module to map the first supportable circuit to a first operable circuit according to the topology structure; or invoking the topological mapping module to map the to-be-complied circuit to a second operable circuit; and invoking the circuit processing module to process the second operable circuit so as to generate a second supportable circuit.

A calibration method and a calibration apparatus for a delay of a quantum computer system, wherein when the calibration method is implemented, a first control signal is first applied to the qubit on the quantum chip through the first transmission line, simultaneously a second control signal with a preset delay is applied to the qubit through the second transmission line, then the preset delay is updated sequentially within a preset range, and the second control signal with updated preset delay is applied to the qubit, so as to obtain a change curve representing a probability of the quantum state of the qubit being an eigenstate as a function of the preset delay, and then it is determined whether the change curve has a trough, if the change curve has a trough, finally, delay calibration is performed for the first transmission line and the second transmission line based on the preset delay corresponding to the trough of the change curve, so as to eliminate the transmission delay caused by different line lengths and different microwave devices added on the lines, so that the control signals on different lines can reach the quantum chip according to the designed time sequence, thereby realizing the precise regulation of the quantum states.

Disclosed are a method and device for constructing a quantum circuit of a QRAM architecture, the QRAM architecture being configured for accessing data and being a binary tree structure, the method including: partitioning the binary tree structure into basic circuit structures, wherein a basic circuit structure comprises address bits and data bits of one subtree node and data bits of two child nodes in the lower layer of the one subtree node; determining qubits required for a basic quantum circuit to be constructed, according to qubits included in the basic circuit structure; determining an input and an output of the basic quantum circuit to be constructed, according to action relationships between the qubits required for the basic quantum circuit to be constructed; and constructing a basic quantum circuit corresponding to the basic circuit structure, according to the input and the output using the required qubits and quantum logic gates.

Disclosed are a quantum computer operating system and a quantum computer. In the operating system, if the quantity of the free qubits on a certain chip in the quantum chip cluster is not less than the quantity required by the quantum computing task, selecting a first quantum bit whose reading fidelity is within a preset range from the free qubits and obtaining a nearby pair of quantum bits based on the community detection algorithm and the greedy algorithm, and combining them to form a qubit topological structure until the number of quantum bits is equal to the number required by the quantum computing task. Finally, mapping the quantum computing task to be processed with the qubit topological structure to execute the quantum computing task to be processed.

Disclosed are a method and an apparatus for constructing a quantum circuit corresponding to a linear function. The method includes: adding an independent variable of a target linear function on a first qubit; obtaining a second qubit for outputting the target linear function, adding a parametric quantum logic gate acting on the second qubit, and controlling the parametric quantum logic gate by using the first qubit; and determining a parameter value of the parametric quantum logic gate based on the target linear function, to obtain a quantum circuit corresponding to the target linear function.

Disclosed are a quantum chip, a quantum computer, and a fabrication method for a quantum chip. The quantum chip includes a substrate and an adapter plate, at least one qubit is formed on the substrate, signal transmission lines are formed on the adapter plate, and the signal transmission lines are electrically connected to the at least one qubit.