Powertech Technology Inc.

A package structure and a manufacturing method thereof are provided. The package structure includes a first package including a first redistribution layer, at least one chip and a second redistribution layer, and at least one second package disposed on the first package and including a substrate, an adhesive layer, at least two optical chips, an encapsulant layer, and a third redistribution layer. The optical chips are attached to a surface of the substrate close to the first package through the adhesive layer, and each optical chip has an optical surface close to the substrate. The encapsulant layer is disposed on the surface and surrounds the optical chips. The third redistribution layer is disposed between the encapsulant layer and the second redistribution layer, in which the second redistribution layer is electrically connected to the optical chips through the third redistribution layer.

A stacked package device has a first package and a second package vertically stacked and electrically connected to each other. One or each of the first package and the second package includes a first substrate, a second substrate and an intermediate substrate. A first flip-chip and a second flip-chip are respectively mounted on opposite surfaces of the first substrate and the second substrate. The intermediate substrate is electrically connected between the opposite surfaces of the first substrate and the second substrate for signal transmission between the first flip-chip and the second flip-chip. The use of the intermediate substrate avoids the structure damage resulting from thermal stress. Since no encapsulant is provided to cover each flip-chip, the problem of separation between the encapsulant and the substrates is avoided.

A package structure includes a substrate, an interposer module, a chip module, and a first encapsulant. The interposer module is arranged on the substrate. The chip module is arranged on the interposer module. The chip module is electrically connected to the substrate through the interposer module. The first encapsulant encapsulates the chip module and the interposer module and directly contacts the substrate. A bottom surface of the first encapsulant and a top surface of the substrate are coplanar. A manufacturing method of a package structure is also disclosed.

Provided is a package structure, which includes a substrate, an interposer module, and a chip module. The interposer module is disposed on the substrate. The interposer module includes a first insulating layer, a second insulating layer, and multiple dummy terminals. The first insulating layer is disposed between the second insulating layer and the substrate. The multiple dummy terminals are in direct contact with the first insulating layer and the substrate. The chip module is disposed on the interposer module and is electrically connected to the substrate through the interposer module. Also provided is a manufacturing method of a package structure. The plurality of external terminals include a plurality of functional components. The substrate is disposed between the plurality of dummy terminals and the plurality of external terminals, and the plurality of dummy terminals are electrically insulated the plurality of functional components.

A package structure and a manufacturing method thereof are provided. The package structure includes a redistribution layer, a conductive pillar, an active chip, an encapsulation layer, and another redistribution layer. The conductive pillar and the active chip are side by side disposed on the redistribution layer. The encapsulation layer surrounds the active chip and the conductive pillar, in which the encapsulation layer has a first through hole disposed between the active chip and the redistribution layer and a second through hole disposed between the conductive pillar and the redistribution layer, and a depth of the first through hole is less than a depth of the second through hole. The another redistribution layer is disposed on a side of the redistribution layer away from the redistribution layer and electrically connected to the redistribution layer through the conductive pillar.

A package device and a manufacturing method thereof are provided. The package device includes a substrate, a plurality of conductive pillars, a redistribution layer, at least one bridge chip, at least two active chips, an encapsulant, and an underfill layer. The conductive pillars are disposed on the substrate side by side, the redistribution layer is disposed on the conductive pillars, and the bridge chip is disposed between the substrate and the redistribution layer. The active chips are disposed on the redistribution layer, the bridge chip is coupled between the active chips, and the encapsulant is disposed on the redistribution layer and surrounds the active chips. The underfill layer is disposed between adjacent two of the conductive pillars and between one of the conductive pillars and the bridge chip.

A semiconductor package component which has an outer profile including an oblique package edge obliquely interconnecting between two adjacent side walls. The semiconductor package component includes a first redistribution layer (RDL) unit, a chip unit, a dummy die unit, an encapsulation layer, and a second RDL unit. The chip unit is disposed on the first RDL unit. The dummy die unit includes a dummy die that is disposed on the first RDL unit, and has a dummy die edge which extends in a direction parallel to the oblique package edge. A method for making the semiconductor package component is also disclosed.

An optoelectronic package includes a first and a second redistribution layers, a plurality of first and second metal pillars, an optoelectronic chip, a first and a second insulation layers and a processing component. The first metal pillars are disposed on the first redistribution layer. The optoelectronic chip includes a wiring layer, an active structure and a main layer. The wiring layer is electrically connected to the first metal pillars. The main layer is disposed between the wiring layer and the active structure. The first insulation layer disposed on the first redistribution layer covers the optoelectronic chip and the first metal pillars. The processing component is electrically connected to the first redistribution layer which is located between the processing component and the optoelectronic chip. The second metal pillars and the second insulation layer are disposed between the first redistribution layer and the second redistribution layer.

A semiconductor package structure includes a first package and a second package. The first package includes a first redistribution layer, a second redistribution layer, a third redistribution layer, at least one first chip, at least one second chip, multiple first conductive elements, multiple second conductive elements, a first encapsulant, a second encapsulant, and multiple solders. The second redistribution layer is located between the first redistribution layer and the third redistribution layer and includes multiple chip connectors. Each chip connector includes a connecting pad, a nickel layer, and a gold layer. The connecting pad has top surface and a peripheral surface. The nickel layer covers the top surface and the peripheral surface of the connecting pad, and the gold layer covers the nickel layer located on the top surface of the connecting pad. The second encapsulant is disposed on the third redistribution layer and is electrically connected to the first encapsulant.

An image sensor package includes an image sensor chip having a chip body, a metal dam, and a transparent substrate having a surface. The chip body has an active surface including a photosensitive area and a non-sensitive area surrounding the photosensitive area. The metal dam is formed on the non-sensitive area of the active surface, surrounds a photosensitive layer formed on the photosensitive area at intervals, is electrically insulated from the chip body, and has a thickness. A glue dam is formed on the surface and is aligned with and is bonded to the metal dam. A thickness of the glue dam is less than the thickness of the metal dam. Accordingly, the metal dam and the glue dam are combined to form a dam structure, and the quantity of liquid glue to form the glue dam is decreased. Thus, the yield of the image sensor package is enhanced.