Qorvo US, Inc.

Circuit designs and control techniques focused on maximizing the power conversion efficiency of amplifiers, especially for radio frequency (RF) or audio applications, often involving load modulation, envelope tracking, or specific amplifier classes (e.g., Class-D, Doherty).

Techniques and hardware architectures for optimizing the radio frequency (RF) front-end, antenna systems, and beamforming strategies in wireless networks to improve signal quality, capacity, and interference mitigation.

Devices utilizing piezoelectric materials to generate and filter acoustic waves, often for radio frequency applications, including surface acoustic wave (SAW) and bulk acoustic wave (BAW) structures.

Methods and structures for encapsulating, interconnecting, and integrating impedance network components, particularly acoustic filters, into larger modules or systems.

Methods and circuits to detect and compensate for various imperfections in amplifier operation, such as DC offset, gain errors, phase errors, duty-cycle errors, or input error components, to improve accuracy and signal integrity.

Amplifier designs that allow for dynamic adjustment of their operating characteristics, such as gain, impedance, or amplification path, based on control signals, input conditions, or desired performance modes.

Packaging technologies where bare dies are embedded within a mold compound or substrate cavity, and then interconnected using redistribution layers (RDLs) for fan-out or compact integration, often avoiding through-silicon vias in the chips themselves.

Novel materials and processes for forming low-resistance electrical contacts and interconnects within semiconductor devices, including selective deposition, silicidation, and barrier layers for improved performance and scaling.

Systems and methods for electronically steering or shaping antenna beams by controlling the phase and amplitude of signals fed to individual elements in an array, including calibration techniques and multi-antenna configurations.

Techniques and methodologies for fabricating semiconductor devices, including etching, deposition, annealing, isolation, and doping steps, aimed at improving yield, performance, or enabling new structures.

Circuitry and techniques specifically designed to amplify weak signals while minimizing the introduction of additional noise and maintaining high linearity, often incorporating impedance matching, parasitic neutralization, or protection circuits.

Techniques and structures used to reduce unwanted electromagnetic coupling, scattering, or interference between multiple antennas, different frequency bands, or sensitive electronic components within a device.

Techniques for stacking multiple semiconductor dies or active layers vertically to achieve higher density and shorter interconnections, often utilizing through-silicon vias (TSVs) or other vertical conductive paths like through-hole electrodes.

Integrated solutions for dissipating heat generated by high-density semiconductor devices within the package, including embedded cooling structures, cold plates, and optimized fluidic channels.

Antennas engineered to operate effectively across a wide continuous range of frequencies (broadband) or multiple distinct frequency bands, often requiring specific radiating element geometries or impedance matching circuits.

Circuits designed to transform the impedance of a source to match the impedance of a load, maximizing power transfer or minimizing signal reflections, often involving inductors, capacitors, and transformers.

Focuses on novel circuit configurations for DC-DC, DC-AC, or AC-DC conversion, often involving resonant operation, multi-level structures, or switched capacitors to improve efficiency, power density, or voltage conversion ratios.

Techniques for encoding digital data onto analog carrier signals using complex constellation diagrams, multi-level signaling, or layered approaches, often combined with error correction codes, to achieve higher data rates, improved spectral efficiency, or extended range.

Techniques enabling simultaneous transmission and reception of signals on the same or adjacent frequency bands, including methods for managing and mitigating self-interference and configuring network resources for such operation.

Design and manufacturing techniques for incorporating antenna structures directly into electronic devices, product housings, or materials, often under constraints of space, aesthetics, or environmental factors.

Methods for designing, transmitting, and utilizing specific reference signals (e.g., DMRS, SRS, PT-RS) to enable accurate channel estimation, interference measurement, synchronization, or sensing in wireless communication systems.

Design and configuration of adaptable frame structures, resource block groupings, and subcarrier spacings to optimize data transmission across diverse wireless environments and services, including considerations for fronthaul interfaces.

Materials and processes for hermetic encapsulation, conformal coating, optical chip sealing, and stretchable conductors for electronic and optoelectronic devices.

Specialized amplifier types designed for converting current to voltage (transimpedance) or voltage to current (transconductance), often featuring virtual ground configurations, precise gain setting, and compensation for input/output characteristics.

Combining different types of functional chiplets (e.g., compute, memory, I/O, optical, power, biological) into a single package or system, often to optimize performance, power, or cost by leveraging specialized components.

Advanced techniques for forming and optimizing gate dielectrics, work function layers, and other dielectric layers within transistor structures to improve performance, reliability, and scaling.

Techniques and circuits designed to regulate output, manage input variations, mitigate resonance, or ensure stable operation of power converters under diverse load and source conditions. This includes adaptive, predictive, or fault-tolerant control schemes.

Methods and systems for accurately determining the absolute or relative position of an object or device, often integrating satellite navigation (GNSS), inertial measurement units (IMU), and local ranging or wireless communication technologies.

Methods for temporarily attaching a wafer or substrate to a carrier for thinning, dicing, or other processing, followed by controlled debonding, often using light-sensitive resins, temporary adhesives, or roughened interfaces.

Development of novel materials and designs for bonding, sealing, and underfill applications, focusing on improving mechanical integrity, electrical performance, and preventing defects like cracks or delamination in chip-to-chip connections.

Methods for acquiring and utilizing accurate channel state information (CSI), including channel estimation and reciprocity transforms, to enable advanced spatial processing techniques like beamforming for improved signal quality and spectral efficiency.

Incorporation of novel semiconductor, dielectric, or metallic materials into transistor structures to achieve enhanced performance, new functionalities, or specific device characteristics.

Systems enabling wireless communication between vehicles (V2V), vehicles and infrastructure (V2I), or vehicles and other entities (V2X) to share information for traffic management, safety, and navigation.

Techniques and circuits designed to detect, estimate, and mitigate various physical layer signal impairments such as frequency spurs, phase noise, or non-linear distortions, thereby improving overall signal quality and system performance.

Systems and methods for automated substrate transport, precise positioning, temperature regulation, and chamber environment management to ensure process stability, uniformity, and yield in semiconductor manufacturing.

Development and application of resin compositions, molding compounds, and underfill materials to protect semiconductor devices from environmental factors, moisture, mechanical stress, and for structural integrity.

Techniques for precise material removal, pattern shaping, and controlling etch selectivity or uniformity, often involving plasma, wet chemistry, or directed beams to achieve desired features on semiconductor substrates.

Manufacturing processes and structural designs for transistors utilizing fin-shaped channels or multiple gates (e.g., FinFETs, Gate-All-Around FETs) to enhance gate control and reduce short-channel effects.

Novel electrical connection methods within or between package components, including through-glass vias (TGVs), backside contacts, and optimized redistribution layers for improved signal and power integrity.

Mobile applications and systems leveraging wireless communication and location data (e.g., GPS, RFID, geo-fencing) to provide context-specific services, transactions, or user interactions.

Design and operation of transistors optimized for memory applications, including floating body devices, ferroelectric FETs (FeFETs), vertical TFTs for 3D arrays, and charge-trapping memory cells.

Innovations in the physical components and architectures of radar, lidar, and sonar systems, including antenna design, RF signal generation, beam steering mechanisms, and optical elements for improved performance.

Processes involving chemical and mechanical forces to planarize surfaces (CMP) or wet chemical treatments for cleaning, etching, or material removal, often utilizing specialized compositions, nozzles, or fluid management systems.

Integration of power converters with energy storage devices (batteries, supercapacitors) or grid interfaces, often involving AC/DC conversion, power flow management, and fault handling for hybrid power systems or specific applications like EVs or PV.