Company patents
RF360 Singapore Pte. Ltd.
RF 360 Singapore Pte. Ltd. demonstrates a highly concentrated patent strategy, with 91.8% of its portfolio in Impedance Networks (Filters, Resonators), which saw a remarkable 700.0% YoY growth in 2024, indicating a strong, albeit potentially maturing, focus given the -64.4% decline so far in 2026. Surprisingly, despite this core focus, the company also shows emerging interest in Semiconductor Packaging & Encapsulation and Chip-to-Chip Interconnect (Bonding, Bumps), both experiencing 100.0% YoY growth in 2025, suggesting a diversification into related semiconductor manufacturing aspects.
Patent Trend by Technology Area
Yearly patent publications since 2023
Product themes
Product-level themes inferred from filings since 2023, with category chips showing where each theme appears. Select a theme to filter the patents below.
146 US filings (since 2023) · 5 categories · 9 themes
Devices utilizing piezoelectric materials to generate and filter acoustic waves, often for radio frequency applications, including surface acoustic wave (SAW) and bulk acoustic wave (BAW) structures.
Methods and structures for encapsulating, interconnecting, and integrating impedance network components, particularly acoustic filters, into larger modules or systems.
Focuses on the design, fabrication, and application of piezoelectric materials and devices for sensing, actuation, or wave generation, including material properties, single crystal growth, and protective layers.
Circuits designed to transform the impedance of a source to match the impedance of a load, maximizing power transfer or minimizing signal reflections, often involving inductors, capacitors, and transformers.
Novel materials and processes for forming low-resistance electrical contacts and interconnects within semiconductor devices, including selective deposition, silicidation, and barrier layers for improved performance and scaling.
Development of novel materials and designs for bonding, sealing, and underfill applications, focusing on improving mechanical integrity, electrical performance, and preventing defects like cracks or delamination in chip-to-chip connections.
Development of memory cells utilizing resistive switching or phase-change materials, including novel material compositions, multi-layered structures, and integration with selector devices like bipolar junction transistors, to achieve non-volatile storage.
Packaging technologies where bare dies are embedded within a mold compound or substrate cavity, and then interconnected using redistribution layers (RDLs) for fan-out or compact integration, often avoiding through-silicon vias in the chips themselves.
Techniques for stacking multiple semiconductor dies or active layers vertically to achieve higher density and shorter interconnections, often utilizing through-silicon vias (TSVs) or other vertical conductive paths like through-hole electrodes.
Patents
Showing 1-10 of 146