Sapien Semiconductors Inc.

A display driving apparatus according to an embodiment of the disclosure includes: a pixel driving circuit connected to each of a plurality of light-emitting diodes (LEDs) forming at least one row and column and configured to drive the LEDs in a pulse width modulation (PWM) method; a controller configured to determine a PWM duty ratio (PWM On-duty) indicating a light emitting time period of the LED during one frame section; and a timing controller configured to generate a first clock signal according to the PWM duty ratio and supply the first clock signal to the pixel driving circuit in a row or column unit through a shift register, wherein, when the PWM duty ratio is changed, the timing controller is configured to generate a second clock signal matching the changed PWM duty ratio, and selectively supply the first clock signal or the second clock signal to the pixel driving circuit.

A method and apparatus for low-power driving of a display device having in-pixel memory is provided. A display control method of a host device includes: generating display data; generating a synchronization signal for outputting the display data on a frame-by-frame basis; determining whether current frame data is identical to previous frame data for the frame data generated on the frame-by-frame basis; and transmitting, when the current frame data is identical to the previous frame data, a command indicating no change in frame data to a display module.

A low-power driving method and apparatus based on data change detection in a display device having in-pixel memory are disclosed. The method of operating the display device includes receiving, from a host device, a command indicating that current frame data is the same as previous frame data, maintaining, by the display driver integrated circuit (IC), an internal sync signal generated based on the previous frame data while deactivating a frame data transmission path, and performing, by the display panel, a display operation based on the internal sync signal and the previous frame data stored in the in-pixel memory.

A pixel driving circuit for a display device includes a clock generator configured to generate clock signals with different time periods for different locations of bit values of the image data, an array of a plurality of pixels, each pixel including a light-emitting element, and an in-pixel memory configured to store image data comprising a set of bit values from a most significant bit (MSB) to a least significant bit (LSB), and a controller configured to read the set of bit values of the image data in an order, starting from the LSB bit to the MSB, to generate pulse width modulation (PWM) signals.

A partial display control method and an apparatus for low-power operation are disclosed. The display control apparatus may include a pixel array in which pixels each having an in-pixel memory are arranged, a processor configured to output sequential line activation signals for respective lines of the pixel array, and to logically generate a flag bit indicating whether to update pixel data of each pixel included in a line activated by the line activation signal.

There is provided a method for driving a display device at low power. The method includes steps of: (a) a display power controller determining an allowable power value for driving the display device according to a predetermined condition; and (b) in case a present power value due to a driving of the display device is greater than the allowable power value, the display power controller performing at least one of (i) a 1-st driving current control sub-process of reducing a 1-st bias current supplied to a display panel of the display device to a 2-nd bias current corresponding to the allowable power value, (ii) a 2-nd driving current control sub-process of reducing an on-duty time of a PWM for driving LEDs of the display panel, and (iii) a 3-rd driving current control sub-process of performing at least one of BC and ACL which correspond to the video data.

Disclosed are a device and a method for supporting image data movement within a display. The display device may include a controller configured to control data writing, driving of a light-emitting element, and data movement, and a plurality of pixels each including a pixel-embedded memory configured to store image data represented by a multi-bit value. Each of the plurality of pixels may be configured to store image data in the pixel-embedded memory during a data write time interval and shift the image data stored in the pixel-embedded memory to one of upper, lower, left, or right adjacent pixels based on a control signal input from the controller during a data movement time interval.

Method for driving a display system at low power with a Mobile Industry Processor Interface. The method of a display driver IC includes: (a) upon receiving a t1-st MIPI sync signal and a t1-st video data, (i) synchronizing the t1-st MIPI sync signal with a t1-st display sync signal, (ii) generating a t1-st display data, and (iii) transmitting the t1-st display sync signal and the t1-st display data to a display panel having in-pixel memory, to store the t1-st display data in in-pixel memories and display a t1-st video image; and (b) in response to receiving a low power drive initiating command, in case a (t1+1)-th MIPI sync signal and a (t1+1)-th video data has not been received, transmitting a (t1+1)-th display sync signal to the display panel having in-pixel memory, to display the t1-st video image corresponding to the t1-st display data stored in the in-pixel memories.

A pixel-driving circuit for driving a digital display device, the pixel-driving circuit formed on an interposer that is electrically connected to a display substrate through a plurality of bumps. The pixel-driving circuit comprises a row terminal connected to a row bump connected to a row line of a row-driving circuit among the plurality of bumps, a column terminal connected to a column bump connected to a column line of a column-driving circuit among the plurality of bumps, a common element that shares at least one of the row terminal or the column terminal for L (L is a positive integer greater than or equal to 2) display pixels formed on the interposer, and L pixel individual elements connected to the common element and driving a plurality of light emitters included in each of the L display pixels.

A pixel-driving circuit for driving a digital display device, the pixel-driving circuit formed on an interposer that is electrically connected to a display substrate through a plurality of bumps. The pixel-driving circuit comprises a row terminal connected to a row bump connected to a row line of a row-driving circuit among the plurality of bumps, a column terminal connected to a column bump connected to a column line of a column-driving circuit among the plurality of bumps, a common element that shares at least one of the row terminal or the column terminal for L (Lis a positive integer greater than or equal to 2) display pixels formed on the interposer, and L pixel individual elements connected to the common element and driving a plurality of light emitters included in each of the L display pixels.