Shanghai Huali Integrated Circuit Corporation

Techniques and methodologies for fabricating semiconductor devices, including etching, deposition, annealing, isolation, and doping steps, aimed at improving yield, performance, or enabling new structures.

Advanced techniques for forming and optimizing gate dielectrics, work function layers, and other dielectric layers within transistor structures to improve performance, reliability, and scaling.

Manufacturing processes and structural designs for transistors utilizing fin-shaped channels or multiple gates (e.g., FinFETs, Gate-All-Around FETs) to enhance gate control and reduce short-channel effects.

Novel materials and processes for forming low-resistance electrical contacts and interconnects within semiconductor devices, including selective deposition, silicidation, and barrier layers for improved performance and scaling.

Design and operation of transistors optimized for memory applications, including floating body devices, ferroelectric FETs (FeFETs), vertical TFTs for 3D arrays, and charge-trapping memory cells.

Structural innovations in individual transistors, such as fin-based field-effect transistors (FinFETs), 3D gate structures, or multi-layer active regions, aimed at improving performance or density.

Focuses on the design and manufacturing of transistors where the gate material fully encircles the channel, often using nanosheets or fins, to improve electrostatic control and reduce short-channel effects.

Focuses on the physical design, materials, and manufacturing processes for individual memory cells, including transistor structures, interconnects, and multi-layered (3D) architectures to enhance density and performance.

Development of memory cells utilizing resistive switching or phase-change materials, including novel material compositions, multi-layered structures, and integration with selector devices like bipolar junction transistors, to achieve non-volatile storage.

Techniques and apparatus for electrically testing semiconductor devices, integrated circuits, or wafers during manufacturing or post-assembly, including built-in self-test (BIST) and contact reliability assessment.

Techniques for stacking multiple semiconductor dies or active layers vertically to achieve higher density and shorter interconnections, often utilizing through-silicon vias (TSVs) or other vertical conductive paths like through-hole electrodes.

Techniques for designing and fabricating the conductive pathways (interconnects) and their contacts between different components within an integrated circuit, focusing on density, reliability, and performance.

Techniques for precise material removal, pattern shaping, and controlling etch selectivity or uniformity, often involving plasma, wet chemistry, or directed beams to achieve desired features on semiconductor substrates.

Techniques and systems for precisely measuring electrical or electromagnetic properties of materials or components, often involving specialized resonators, waveguides, or multi-range measurement systems to ensure accuracy.

Integration of dedicated physical structures or built-in circuitry within semiconductor devices to enable characterization of process variations, material properties, electrical leakage, or device performance.

Methods and equipment for applying photoresist uniformly onto wafers, forming patterns through various exposure techniques (e.g., direct imaging, multi-exposure), and integrating patterned layers into semiconductor structures or packaging.

Techniques for forming electrical contacts, vias, and interconnects to semiconductor devices, including advanced methods like contact-over-active-gate (COAG) and backside contacts for improved density and performance.

Methods and apparatus for precise wafer positioning, ion beam uniformity, and dose monitoring during ion implantation processes in semiconductor device manufacturing.

Techniques and apparatus for measuring critical dimensions, overlay accuracy, defect detection, and surface topography in lithographic processes, often involving optical, laser, or charged particle beams.

Integration of various sensor types (e.g., thermal, strain) or display components directly onto semiconductor substrates or within device architectures for compact and high-performance systems.

Systems and methods for automated substrate transport, precise positioning, temperature regulation, and chamber environment management to ensure process stability, uniformity, and yield in semiconductor manufacturing.

Methods and circuits for detecting and mitigating defects, ensuring data integrity, and enabling self-testing and repair mechanisms within memory devices and subsystems.

Innovations in the design, materials, and manufacturing of lithography masks, including reflective masks, programmable masks, and defect mitigation strategies, to enable finer feature patterning and process control.

Development of novel chemical compositions for photoresists, including polymers, sensitizers, and crosslinking agents, to achieve improved lithographic performance such as resolution, sensitivity, line edge roughness, and etch resistance.

Design and control of plasma processing chambers, including heating, gas delivery, electrode configurations, and magnetic field control for uniform and efficient material processing in semiconductor manufacturing.

Incorporation of novel semiconductor, dielectric, or metallic materials into transistor structures to achieve enhanced performance, new functionalities, or specific device characteristics.

Design and operation of analog and mixed-signal circuits within the memory array, such as page buffers, sense amplifiers, and data latches, responsible for reading and writing data from/to memory cells.

Systems and methods for delivering radio frequency (RF) power to plasma processing chambers, including impedance matching, pulse shaping, and feedback control for stable and efficient plasma generation.

Methods for temporarily attaching a wafer or substrate to a carrier for thinning, dicing, or other processing, followed by controlled debonding, often using light-sensitive resins, temporary adhesives, or roughened interfaces.

Techniques and systems for real-time or near-real-time measurement and adjustment of semiconductor manufacturing parameters (e.g., temperature, etch rate, ion beam uniformity) to ensure process quality and consistency.

Digital logic and control circuits for managing power delivery, driving various loads (e.g., inductive, display elements), converting power, and protecting against over-voltage or electrostatic discharge. Includes gate drivers for power FETs and voltage level shifters.

Techniques and apparatus for achieving and maintaining vacuum conditions within charged particle and plasma processing chambers, including pump control, vacuum degree monitoring, and chamber sealing.

Circuits and techniques for generating, synchronizing, interpolating, and recovering high-frequency clock signals and high-speed data streams, often involving reduced propagation delay, multi-level signaling, and robust sampling mechanisms.