Company patents
SHIN-ETSU HANDOTAI CO., LTD.
SHIN-ETSU HANDOTAI CO., LTD. demonstrates a clear focus on core semiconductor technologies, with "Semiconductor Manufacturing Process" accounting for 46.6% of its portfolio. While patenting in this area saw a significant decline of -76.2% so far in 2026, the company is surprisingly showing an emerging focus on "Semiconductor Diodes & Transistors" with a 75.0% YoY growth in 2026, and "Light-Emitting Devices (LEDs)" with a 100.0% YoY growth in 2026, suggesting a strategic shift towards specific device types and display technologies.
Patent Trend by Technology Area
Yearly patent publications since 2023
Product themes
Product-level themes inferred from filings since 2023, with category chips showing where each theme appears. Select a theme to filter the patents below.
161 US filings (since 2023) · 12 categories · 25 themes
Techniques and methodologies for fabricating semiconductor devices, including etching, deposition, annealing, isolation, and doping steps, aimed at improving yield, performance, or enabling new structures.
Development and manufacturing of semiconductor devices using wide bandgap materials like Silicon Carbide (SiC) or Gallium Nitride (GaN) for high-power, high-frequency, or high-temperature applications.
Novel materials and processes for forming low-resistance electrical contacts and interconnects within semiconductor devices, including selective deposition, silicidation, and barrier layers for improved performance and scaling.
Methods and apparatus for cleaning polishing pads, dressers, chamber components, or finished substrates to remove residues, debris, or contaminants, often involving specialized nozzles, fluids, or mechanical actions.
Methods for depositing thin films with controlled conformality, thickness, and material properties, including selective deposition on specific areas, often using atomic layer deposition (ALD), chemical vapor deposition (CVD), or epitaxial growth.
Development and optimization of the semiconductor material layers and their interfaces within an LED to control light emission properties, manage internal stress, and improve device efficiency.
Inspection and testing methods specifically designed for wafers before, during, or after bonding processes, including verification of bonding surfaces, alignment, and defect detection in multi-wafer or stacked die assemblies.
Methods and structures for mass-producing and assembling arrays of micro-LEDs onto a substrate, including transfer processes, bonding techniques, and defect management.
Methods for temporarily attaching a wafer or substrate to a carrier for thinning, dicing, or other processing, followed by controlled debonding, often using light-sensitive resins, temporary adhesives, or roughened interfaces.
Techniques for precise material removal, pattern shaping, and controlling etch selectivity or uniformity, often involving plasma, wet chemistry, or directed beams to achieve desired features on semiconductor substrates.
Innovations in the internal design of individual light-emitting diode chips or packages, focusing on semiconductor layer arrangements, electrode configurations, reflective elements, and light extraction features.
Systems and methods for automated substrate transport, precise positioning, temperature regulation, and chamber environment management to ensure process stability, uniformity, and yield in semiconductor manufacturing.
Processes involving chemical and mechanical forces to planarize surfaces (CMP) or wet chemical treatments for cleaning, etching, or material removal, often utilizing specialized compositions, nozzles, or fluid management systems.
Utilizing optical systems, cameras, and image processing algorithms for precise measurement of physical dimensions, alignment, defects, and features on semiconductor wafers or packages.
Systems that employ imaging and image processing to automatically detect defects, verify states, or ensure quality control in manufactured goods, printed materials, or industrial processes.
Incorporation of novel semiconductor, dielectric, or metallic materials into transistor structures to achieve enhanced performance, new functionalities, or specific device characteristics.
Specialized design and fabrication of light-emitting diodes specifically engineered to produce light in the deep ultraviolet (DUV) spectrum, often for applications like sterilization or curing.
Advanced techniques for forming and optimizing gate dielectrics, work function layers, and other dielectric layers within transistor structures to improve performance, reliability, and scaling.
Optical structures and lens designs that improve light extraction efficiency from LED dies and modules, including diffractive films, micro-lens arrays, reflectors, and color-conversion layers.
Design and application of abrasive tools and deburring heads tailored for specific geometries, materials, or access constraints, including flexible, expandable, or multi-component designs for precision finishing.
Techniques for stacking multiple semiconductor dies or active layers vertically to achieve higher density and shorter interconnections, often utilizing through-silicon vias (TSVs) or other vertical conductive paths like through-hole electrodes.
Integration of robotics, sensors, and control systems to automate the grinding, polishing, or deburring process, including workpiece handling, tool adjustment, and system maintenance for improved efficiency and precision.
Integrated solutions for dissipating heat generated by high-density semiconductor devices within the package, including embedded cooling structures, cold plates, and optimized fluidic channels.
Focuses on the chemical and physical properties of polishing slurries and the design of polishing pads, including their material composition, groove patterns, and thermal characteristics, to optimize chemical-mechanical planarization processes.
Layout, material composition, and structural arrangement of photoelectric conversion elements and associated circuitry within image sensor arrays, including infrared detectors and back-side illuminated structures.
Patents
Showing 1-10 of 32
Post-Processing Cleaning & Conditioning