STMicroelectronics (Grand Ouest) SAS

In embodiments, a system includes a first and a second processing unit, a memory, and a firewall device. The first processing unit operates in a secure mode and generates memory access requests having a secure level. The second processing unit operates in a non-secure mode and generates memory access requests having a non-secure level. The memory includes a first memory area that can be shared between the first and second processing units. The firewall device includes a first firewall circuit with a first configuration authorizing access to the first memory area in the presence of a secure or non-secure level access request. The firewall circuit includes a second configuration prohibiting access to the first memory area in the presence of a secure level access request and authorizing access to the first memory area only in the presence of a non-secure level access request.

System, method, and circuitry for generating content for a programmable computing device based on user-selected memory regions. Contiguous regions that share memory access attributes are merged, interleaved contiguous regions that share at least one nested attribute are defined into combined regions, and remaining regions are defined as separate independent regions. A memory protection unit (MPU) region size closest to a size of each defined region is identified. If the start address of each region aligns with the address structure of the MPU region size, then those regions are assigned to MPU regions having the MPU region size; otherwise, another MPU size that aligns with the size of the regions is selected and those regions are assigned to MPU regions having that size. Content is generated to configure settings of MPU regions of the programmable computing device for the merged contiguous regions, the combined region, and the independent regions.

The present disclosure relates to a method for demodulating a RF signal comprising the steps of: detecting if an analog to digital converter (ADC) of a Near Zero Intermediate Frequency (NZIF) receiver is in a clipping state; and if yes: determining and storing a first value (RSSI 1 ) representative of the energy of a received signal demodulated by the Near Zero Intermediate Frequency (NZIF) receiver using a first intermediate frequency (IF 1 ); determining and storing a second value (RSSI 2 ) representative of the energy of the received signal demodulated by the Near Zero Intermediate Frequency (NZIF) receiver using a second intermediate frequency (IF 2 ) corresponding to the opposite value of the first intermediate frequency (IF 1 ), selecting the intermediate frequency corresponding to the lowest value of said first and second values.

A voltage regulator includes a pre-regulation circuit and a low drop-out voltage regulator. The pre-regulation circuit is configured to generate a first power supply voltage based on an input voltage. The low drop-out voltage regulator is configured to generate a second power supply voltage based on the first power supply voltage. Additionally, the low drop-out voltage regulator is configured to filter a low-frequency component of the first power supply voltage.

In an embodiment a method includes detecting, by a monitoring circuit, on a bus of a device during execution by a processor of a code stored in a memory, an address for reading from the memory, wherein the device comprises the processor, the memory, the monitory circuit and the bus coupled to the memory, comparing, by the monitoring circuit, the address with one or more first addresses and controlling, by the monitoring circuit, a clock control circuit to prevent an activation of one or more peripheral circuits when the address is part of the one or more first addresses.

Load current consumption measured using a first resistor having a high resistive value and a second resistor having a low resistive value. Differential amplifiers, the outputs of which are coupled to analog-to-digital converters and to a processing circuit unit, are connected to each of the nodes of the resistors. Depending on the current level, the processing circuit unit advantageously selects one of the analog-to-digital converters to estimate the present consumption of current in the load. Each input terminal of a resistor is advantageously power supplied from a power amplifier and each power amplifier is advantageously driven by a control loop. For low load currents, the first amplifier associated with the first resistor power supplies the load through the resistors while, for high load currents, when this first amplifier saturates, the second amplifier associated with the second resistor, takes over from the first amplifier to continue to power supply the load.

The method for managing access rights of memory regions of a memory comprises assigning an execution permission status for each memory region in a firewall device dedicated to the memory, so that the content of a memory region having an executable status is capable of being executed by a processor, and the content of a memory region having a non-executable status cannot be executed by the processor.

A system includes inertial sensors and a GPS. The system generates a first estimated vehicle velocity based on motion data and positioning data, generates a second estimated vehicle velocity based on the processed motion data and the first estimated vehicle velocity, and generates fused datasets indicative of position, velocity and attitude of a vehicle based on the processed motion data, the positioning data and the second estimated vehicle velocity. The generating the second estimated vehicle velocity includes: filtering the motion data, transforming the filtered motion data in a frequency domain based on the first estimated vehicle velocity, generating spectral power density signals, generating an estimated wheel angular frequency and an estimated wheel size based on the spectral power density signals, and generating the second estimated vehicle velocity as a function of the estimated wheel angular frequency and the estimated wheel size.

An electronic device is configured to support at least two configurations, one of the configurations being installed. The device includes a memory. In a limited-access region of the memory, a binary word is stored. That binary word has: a first value representative of the version of the installed configuration; and at least one second value indicating which configurations can be installed. A method of configuration of the electronic device includes determining, according to the second value, whether the configuration which attempts to be installed is permitted.

A device executes an authentication process protected by an authentication counter that is incremented in case of an authentication failure. The incrementation of the counter is protected against unexpected device power-off or power-off attacks. A non-volatile memory is divided into pairs of cells. The protecting includes writing a fixed value D into an active pair of two consecutive cells. As long as successful authentications occur, the content of the first cell is overwritten by a random value. When a failed authentication occurs, the content of the second cell is overwritten by a random value and the next two consecutive cells are written with the fixed value D. Those cells form the active pair and the protection process is repeated. This mechanism facilitates preventing the lack of incrementation of the authentication counter in case of unexpected device power-off during the processing of a failed authentication.