Company patents
SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC. demonstrates a highly dynamic patent strategy, with significant year-over-year fluctuations across its core semiconductor categories, notably a 140.0% growth in Amplifiers in 2025 and a surprising emergence in Semiconductor Diodes & Transistors with 16 patents in 2025 after zero in prior years. While Semiconductor Packaging & Encapsulation remains its largest focus at 35.6% of its portfolio, the sharp declines so far in 2026 across most categories, including a 92.3% drop in Semiconductor Packaging & Encapsulation and a 100.0% decline in Transistor & Device Structure, suggest a potential shift in R&D priorities or a highly cyclical patenting approach.
Patent Trend by Technology Area
Yearly patent publications since 2023
Product themes
Product-level themes inferred from filings since 2023, with category chips showing where each theme appears. Select a theme to filter the patents below.
160 US filings (since 2023) · 12 categories · 28 themes
Techniques and methodologies for fabricating semiconductor devices, including etching, deposition, annealing, isolation, and doping steps, aimed at improving yield, performance, or enabling new structures.
Novel materials and processes for forming low-resistance electrical contacts and interconnects within semiconductor devices, including selective deposition, silicidation, and barrier layers for improved performance and scaling.
Design and integration of lasers and associated components specifically for transmitting data over optical fibers or through free space, including modulation schemes and efficient light coupling.
Advanced techniques for forming and optimizing gate dielectrics, work function layers, and other dielectric layers within transistor structures to improve performance, reliability, and scaling.
Amplifier designs that allow for dynamic adjustment of their operating characteristics, such as gain, impedance, or amplification path, based on control signals, input conditions, or desired performance modes.
Methods and structures for assembling laser chips into functional modules, encompassing optical alignment, electrical interconnection, mechanical support, thermal management, and encapsulation for protection.
Circuit designs and control techniques focused on maximizing the power conversion efficiency of amplifiers, especially for radio frequency (RF) or audio applications, often involving load modulation, envelope tracking, or specific amplifier classes (e.g., Class-D, Doherty).
Techniques for stacking multiple semiconductor dies or active layers vertically to achieve higher density and shorter interconnections, often utilizing through-silicon vias (TSVs) or other vertical conductive paths like through-hole electrodes.
Techniques for manufacturing semiconductor laser chips, including active region design, mirror structures, current and optical confinement, and the integration of multiple layers or elements on a substrate.
Methods and circuits to detect and compensate for various imperfections in amplifier operation, such as DC offset, gain errors, phase errors, duty-cycle errors, or input error components, to improve accuracy and signal integrity.
Incorporation of novel semiconductor, dielectric, or metallic materials into transistor structures to achieve enhanced performance, new functionalities, or specific device characteristics.
Focuses on the design and manufacturing of transistors where the gate material fully encircles the channel, often using nanosheets or fins, to improve electrostatic control and reduce short-channel effects.
Manufacturing processes and structural designs for transistors utilizing fin-shaped channels or multiple gates (e.g., FinFETs, Gate-All-Around FETs) to enhance gate control and reduce short-channel effects.
Structural innovations in individual transistors, such as fin-based field-effect transistors (FinFETs), 3D gate structures, or multi-layer active regions, aimed at improving performance or density.
Development and application of resin compositions, molding compounds, and underfill materials to protect semiconductor devices from environmental factors, moisture, mechanical stress, and for structural integrity.
Specialized amplifier types designed for converting current to voltage (transimpedance) or voltage to current (transconductance), often featuring virtual ground configurations, precise gain setting, and compensation for input/output characteristics.
Development of novel materials and designs for bonding, sealing, and underfill applications, focusing on improving mechanical integrity, electrical performance, and preventing defects like cracks or delamination in chip-to-chip connections.
Integration of various sensor types (e.g., thermal, strain) or display components directly onto semiconductor substrates or within device architectures for compact and high-performance systems.
Techniques for forming electrical contacts, vias, and interconnects to semiconductor devices, including advanced methods like contact-over-active-gate (COAG) and backside contacts for improved density and performance.
The design and manufacturing of integrated circuits that combine optical and electronic components, particularly for high-speed data communication between processors and memory.
Integrated solutions for dissipating heat generated by high-density semiconductor devices within the package, including embedded cooling structures, cold plates, and optimized fluidic channels.
Packaging technologies where bare dies are embedded within a mold compound or substrate cavity, and then interconnected using redistribution layers (RDLs) for fan-out or compact integration, often avoiding through-silicon vias in the chips themselves.
Systems and components related to fiber lasers and fiber optical amplifiers, including doped fibers, pump schemes, and specialized fiber structures for gain, filtering, or thermal management.
Techniques and circuits designed to detect, estimate, and mitigate various physical layer signal impairments such as frequency spurs, phase noise, or non-linear distortions, thereby improving overall signal quality and system performance.
Design and configuration of adaptable frame structures, resource block groupings, and subcarrier spacings to optimize data transmission across diverse wireless environments and services, including considerations for fronthaul interfaces.
Techniques and systems for ensuring the safe and precise operation of lasers, including power regulation, hazard detection, and deconfliction mechanisms in complex or dynamic environments.
Mechanisms and designs for actively changing or stabilizing the output wavelength, frequency, or spectral properties of a laser, often involving integrated optical filters, resonators, or pump adjustments.
Inspection and testing methods specifically designed for wafers before, during, or after bonding processes, including verification of bonding surfaces, alignment, and defect detection in multi-wafer or stacked die assemblies.
Patents
Showing 1-10 of 41
Gate Stack & Dielectric Engineering