Company patents
TetraMem Inc.
TetraMem Inc. demonstrates a strong and rapidly accelerating focus on core semiconductor memory technologies, with Memory & Storage (Static) and Memory Devices (Structural) collectively representing 90% of its portfolio and experiencing significant growth in 2025 (YoY +257.1% and +214.3% respectively). Surprisingly, despite its core business, the company appears to be shifting away from foundational Integrated Circuit Layout & Arrangement, which saw a -100.0% decline in 2025, and Specialty Semiconductor Devices (Legacy), also down -100.0% in 2025, indicating a highly specialized and forward-looking patent strategy rather than broad semiconductor coverage.
Patent Trend by Technology Area
Yearly patent publications since 2023
Product themes
Product-level themes inferred from filings since 2023, with category chips showing where each theme appears. Select a theme to filter the patents below.
110 US filings (since 2023) · 10 categories · 14 themes
Development of memory cells utilizing resistive switching or phase-change materials, including novel material compositions, multi-layered structures, and integration with selector devices like bipolar junction transistors, to achieve non-volatile storage.
Design and fabrication techniques for magnetoresistive random-access memory (MRAM) cells, focusing on magnetic tunnel junction (MTJ) stack profiles, electrode configurations, and dielectric encapsulation to improve performance and reliability.
Design and implementation of non-traditional logic gates or memory elements, often leveraging new materials or device physics to achieve multi-functionality, adaptive thresholds, or higher density.
Focuses on the physical design, materials, and manufacturing processes for individual memory cells, including transistor structures, interconnects, and multi-layered (3D) architectures to enhance density and performance.
Specialized hardware, architectural designs, and computational methods to improve the speed, efficiency, and security of artificial intelligence and machine learning model execution, particularly for inference and data processing.
Hardware and control techniques for optimizing memory access latency, ensuring data integrity, and managing storage resources efficiently. This includes error correction, read/write voltage control, and intelligent data placement or in-memory computation.
Focuses on the architectural and circuit-level innovations for Analog-to-Digital Converters (ADCs) and Digital-to-Analog Converters (DACs) to improve speed, accuracy, linearity, and power efficiency. Includes specific types like SAR and Delta-Sigma, and their constituent components.
Specialized amplifier types designed for converting current to voltage (transimpedance) or voltage to current (transconductance), often featuring virtual ground configurations, precise gain setting, and compensation for input/output characteristics.
Design and operation of analog and mixed-signal circuits within the memory array, such as page buffers, sense amplifiers, and data latches, responsible for reading and writing data from/to memory cells.
Amplifier designs that allow for dynamic adjustment of their operating characteristics, such as gain, impedance, or amplification path, based on control signals, input conditions, or desired performance modes.
Methods and circuits for detecting and mitigating defects, ensuring data integrity, and enabling self-testing and repair mechanisms within memory devices and subsystems.
Combining different types of functional chiplets (e.g., compute, memory, I/O, optical, power, biological) into a single package or system, often to optimize performance, power, or cost by leveraging specialized components.
Devices leveraging superconductivity or quantum phenomena for applications such as quantum computing, high-efficiency power transmission, or sensitive detection, including materials like graphene Josephson junctions and quantum bits.
Methods and systems for efficiently reducing the size of digital data, often employing adaptive techniques, neural networks, or temporal modeling, to achieve high compression ratios while preserving data quality. Includes entropy coding.
Patents
Showing 1-6 of 6
AI/ML Hardware Acceleration