Company patents
TONG HSING ELECTRONIC INDUSTRIES, LTD.
TONG HSING ELECTRONIC INDUSTRIES, LTD. exhibits a surprising shift in its patent strategy, with a significant emerging focus on energy technologies, as evidenced by a 41.7% year-over-year growth in Photovoltaic / Photoconductive Devices, which now accounts for 19.6% of its portfolio. This contrasts with a notable decline in several core semiconductor areas like Integrated Circuit Layout & Arrangement, which saw a 100.0% year-over-year decrease so far in 2026, and Chip-to-Chip Interconnect (Bonding, Bumps), which declined by 52.6% year-over-year in 2026, suggesting a strategic pivot away from certain traditional semiconductor design aspects.
Patent Trend by Technology Area
Yearly patent publications since 2023
Product themes
Product-level themes inferred from filings since 2023, with category chips showing where each theme appears. Select a theme to filter the patents below.
148 US filings (since 2023) · 12 categories · 18 themes
Methods and structures for integrating and enclosing electronic components into compact, multi-functional modules, often involving embedded components, multi-layer substrates, and electromagnetic shielding for performance and miniaturization.
Manufacturing processes and material compositions for creating electronic circuits on flexible or conformable substrates, enabling novel form factors, enhanced durability, and new applications beyond rigid PCBs.
Focuses on advanced pixel architectures, often involving vertical stacking (3D) or silicon-on-insulator (SOI) structures, to improve performance, density, or functionality of photodiodes, transistors, and floating diffusion regions within image sensor pixels.
Novel materials and processes for forming low-resistance electrical contacts and interconnects within semiconductor devices, including selective deposition, silicidation, and barrier layers for improved performance and scaling.
Combining different types of functional chiplets (e.g., compute, memory, I/O, optical, power, biological) into a single package or system, often to optimize performance, power, or cost by leveraging specialized components.
Development of novel materials and designs for bonding, sealing, and underfill applications, focusing on improving mechanical integrity, electrical performance, and preventing defects like cracks or delamination in chip-to-chip connections.
Packaging technologies where bare dies are embedded within a mold compound or substrate cavity, and then interconnected using redistribution layers (RDLs) for fan-out or compact integration, often avoiding through-silicon vias in the chips themselves.
Image sensors tailored for specific advanced functionalities beyond basic image capture, such as high dynamic range (HDR) imaging, single-photon detection, auto-focus, or distance measurement (LiDAR), often incorporating specialized pixel designs or processing.
Novel electrical connection methods within or between package components, including through-glass vias (TGVs), backside contacts, and optimized redistribution layers for improved signal and power integrity.
Development of sophisticated optical lens assemblies and computational methods to achieve high-resolution, precise, or specialized imaging, often for medical or scientific applications.
Techniques for stacking multiple semiconductor dies or active layers vertically to achieve higher density and shorter interconnections, often utilizing through-silicon vias (TSVs) or other vertical conductive paths like through-hole electrodes.
Integrated solutions for dissipating heat generated by high-density semiconductor devices within the package, including embedded cooling structures, cold plates, and optimized fluidic channels.
Methods for temporarily attaching a wafer or substrate to a carrier for thinning, dicing, or other processing, followed by controlled debonding, often using light-sensitive resins, temporary adhesives, or roughened interfaces.
Development of novel chemical compositions for fluxes, solders, and filler metals to improve material properties, enhance joint reliability, reduce defects, or meet specific application requirements like high-temperature reflow or specialized material joining.
Materials and processes for hermetic encapsulation, conformal coating, optical chip sealing, and stretchable conductors for electronic and optoelectronic devices.
The design and manufacturing of integrated circuits that combine optical and electronic components, particularly for high-speed data communication between processors and memory.
Methods for depositing thin films with controlled conformality, thickness, and material properties, including selective deposition on specific areas, often using atomic layer deposition (ALD), chemical vapor deposition (CVD), or epitaxial growth.
Systems and methods for automated substrate transport, precise positioning, temperature regulation, and chamber environment management to ensure process stability, uniformity, and yield in semiconductor manufacturing.
Patents
Showing 1-10 of 152