Company patents
VueReal Inc.
VueReal Inc. exhibits a patent strategy heavily focused on foundational semiconductor and display technologies, with 'Multi-Chip & 3D Assemblies' accounting for 40.6% of its portfolio. A notable shift is observed in its display strategy, moving away from 'LED & Optoelectronics (Legacy CPC)' which saw a -83.3% decline in 2025 and no patents so far in 2026, towards 'Light-Emitting Devices (LEDs)' which emerged with 35 patents in 2025, indicating a strategic pivot within the LED domain.
Patent Trend by Technology Area
Yearly patent publications since 2023
Product themes
Product-level themes inferred from filings since 2023, with category chips showing where each theme appears. Select a theme to filter the patents below.
197 US filings (since 2023) · 12 categories · 24 themes
Methods and structures for mass-producing and assembling arrays of micro-LEDs onto a substrate, including transfer processes, bonding techniques, and defect management.
Innovations in the internal design of individual light-emitting diode chips or packages, focusing on semiconductor layer arrangements, electrode configurations, reflective elements, and light extraction features.
Methods for temporarily attaching a wafer or substrate to a carrier for thinning, dicing, or other processing, followed by controlled debonding, often using light-sensitive resins, temporary adhesives, or roughened interfaces.
Optical structures and lens designs that improve light extraction efficiency from LED dies and modules, including diffractive films, micro-lens arrays, reflectors, and color-conversion layers.
Novel materials and processes for forming low-resistance electrical contacts and interconnects within semiconductor devices, including selective deposition, silicidation, and barrier layers for improved performance and scaling.
Techniques for stacking multiple semiconductor dies or active layers vertically to achieve higher density and shorter interconnections, often utilizing through-silicon vias (TSVs) or other vertical conductive paths like through-hole electrodes.
Inspection and testing methods specifically designed for wafers before, during, or after bonding processes, including verification of bonding surfaces, alignment, and defect detection in multi-wafer or stacked die assemblies.
Techniques for designing and fabricating the conductive pathways (interconnects) and their contacts between different components within an integrated circuit, focusing on density, reliability, and performance.
Design and implementation of circuits and layouts for driving individual pixels or rows/columns of pixels, including gate drivers, data drivers, pixel driving circuits, and their integration onto the display substrate, often in non-display regions.
Optical systems and components specifically designed for head-mounted displays, augmented reality (AR) glasses, and virtual reality (VR) headsets, focusing on image projection, waveguide integration, and display durability.
Techniques and structural designs for fabricating the physical layers of an OLED display, including material deposition, patterning, and methods to protect the active organic layers from environmental degradation like moisture and oxygen.
Systems that combine light sources, waveguides, and display elements into unified products for backlighting, automotive applications, general lighting, or color-corrected displays.
Systems and methods for automated substrate transport, precise positioning, temperature regulation, and chamber environment management to ensure process stability, uniformity, and yield in semiconductor manufacturing.
Integration of dedicated physical structures or built-in circuitry within semiconductor devices to enable characterization of process variations, material properties, electrical leakage, or device performance.
Combining different types of functional chiplets (e.g., compute, memory, I/O, optical, power, biological) into a single package or system, often to optimize performance, power, or cost by leveraging specialized components.
Techniques and structural designs for assembling multiple display modules or panels to create a larger, continuous display with minimized visible seams, uniform light emission, and robust mechanical integrity.
Development of novel materials and designs for bonding, sealing, and underfill applications, focusing on improving mechanical integrity, electrical performance, and preventing defects like cracks or delamination in chip-to-chip connections.
Development and optimization of the semiconductor material layers and their interfaces within an LED to control light emission properties, manage internal stress, and improve device efficiency.
Components and techniques aimed at improving the visual quality of OLED displays, such as color accuracy, contrast, brightness uniformity, and reducing reflections or glare through optical layers and coatings.
Techniques for precise material removal, pattern shaping, and controlling etch selectivity or uniformity, often involving plasma, wet chemistry, or directed beams to achieve desired features on semiconductor substrates.
Techniques and systems for precisely measuring electrical or electromagnetic properties of materials or components, often involving specialized resonators, waveguides, or multi-range measurement systems to ensure accuracy.
Techniques and circuits for optimizing power consumption, voltage stability, and energy efficiency in display panels, often involving dynamic voltage scaling, duty cycle control, or remnant voltage management.
Techniques and apparatus for electrically testing semiconductor devices, integrated circuits, or wafers during manufacturing or post-assembly, including built-in self-test (BIST) and contact reliability assessment.
Methods and structures for incorporating touch sensing capabilities directly into OLED display panels, typically involving conductive layers and insulating layers within or on top of the display stack.
Patents
Showing 1-10 of 20
LED Optical Extraction & Light Management