Xiamen Tianma Micro-Electronics Co., Ltd.

Provided is a display panel. The display panel includes a pixel driving circuit including a drive transistor, a data write module, a light emission control module, a threshold compensation module and a bias adjustment module. The control terminal of the drive transistor is connected to the first node. The first terminal of the drive transistor is connected to a third node. The second terminal of the drive transistor is connected to a second node. The light emission control module is connected in series with the drive transistor and connected in series with a light-emitting element. The threshold compensation module is connected in series between the control terminal of the drive transistor and the second terminal of the drive transistor. The first terminal of the bias adjustment module is connected to a bias signal terminal. The second terminal is connected to the second terminal of the drive transistor.

Provided is a display panel. In the same shift register unit, an input module receives an input signal and a scan control signal and controls a signal of a first node; a reset module receives a reset clock signal and the scan control signal and controls a signal of a second node; an output module receives the signal of the first node, the signal of the second node, a first level signal, and an output clock signal and outputs a gate drive signal; and the refresh control module controls, according to the first refresh control signal, the time interval of the active level of the gate drive signal output by the shift register unit, and controls, according to the second refresh control signal, the time period of the inactive level of the gate drive signal output by the shift register unit.

Provided are a display panel and a display device. The display panel includes a base substrate, a second transistor, and a third transistor. The second transistor includes a second active layer, a second gate, a fourth gate, a second source, and a second drain. The second active layer includes an oxide semiconductor and is disposed on one side of a first active layer facing away from the base substrate. In a direction perpendicular to the base substrate, a distance between the second gate and the second active layer is D2, a distance between the third gate and the third active layer is D3, a distance between the fourth gate and the second active layer is D4, and a distance between the fifth gate and the third active layer is D5; and (D4 – D2) > (D5 – D3).

Provided are a display panel and a display device. The display panel includes a base substrate, a second transistor, and a third transistor. The second transistor includes a second active layer, a second gate, a fourth gate, a second source, and a second drain. The second active layer includes an oxide semiconductor and is disposed on one side of a first active layer facing away from the base substrate. A length of the second gate in a first direction is L2, a length of the third gate in the first direction is L3, a length of the fourth gate in the first direction is L4, a length of the fifth gate in the first direction is L5, and (L3 – L2) < (L5 – L4).

Provided is a pixel circuit, and the pixel circuit comprise a plurality of picture update periods, at least one of the plurality of picture update periods a data write stage, a data retention stage, and a data compensation stage; at least one of the data compensation stage precedes at least one of the data write stage; at the data compensation stage, the pixel circuit receives a gate scanning signal and is written with a compensation data voltage; at the data write stage, the pixel circuit receives the gate scanning signal and is written with a target data voltage, and the compensation data voltage is different in magnitude from the target data voltage.

A light-emitting module and a display apparatus are provided. The light-emitting module includes a drive substrate including a substrate and a drive layer located at a side of the substrate, cell structures arranged in an array of m rows and n columns and located at a side of the drive layer facing away from the substrate, and drive chips. The drive layer includes thin film transistors, and the substrate is an integral structure. Both m and n are positive integers and m and n are not both 1. The cell structures each include light-emitting devices, and the cell structures are driven independently from each other. One of the cell structures corresponds to at least one of the drive chips.

Provided are a heads up display system and a vehicle. An image generating device emits image light, which is reflected to a projection surface through a reflective assembly; a wavelength-selective reflective film is located on a reflective surface of the reflective assembly, realizing the selective reflection for different wavelength bands. The wavelength-selective reflective film is configured for reflecting at least part of the image light, ensuring that the image light is not affected by the arrangement of the wavelength-selective reflective film. When external interference light enters the heads up display system along a reverse optical path of the image light, the external interference light will first enter the wavelength-selective reflective film before entering the image generating device. The wavelength-selective reflective film only reflects interference light with the same wavelength band as the image light, thereby preventing the most of the interference light from entering the image generating device.

Provided are a display panel and a display device. The display panel includes a base substrate, a first transistor, and a second transistor. The first transistor and the second transistor are formed on the base substrate, the first transistor includes a first active layer, a first gate, a first source, and a first drain, and the first active layer comprises silicon; the second transistor includes a second active layer, a second gate, a second source, and a second drain, and the second active layer comprises an oxide semiconductor and is disposed on one side of the first active layer facing away from the base substrate. In a first direction perpendicular to the base substrate, a first distance between the first gate and the first active layer is D 1 , a second distance between the second gate and the second active layer is D 2 , and D 1 <D 2.

Embodiments of the present application provides a shift register, a gate driving circuit, a panel, a control method and a driving apparatus, the shift register comprises: an output control module, a full screen reset module, a cascade output module and an output module; the output control module is configured to turn on when there is no electrostatic discharge in the shift register so that the first gate signal output terminal outputs a target signal; the cascade output module is configured to provide the first voltage signal or the second voltage signal to the second gate signal output terminal when there is electrostatic discharge in the shift register.

A display panel includes a driver circuit, multiple scan lines and multiple pixels arranged in an array. Gates of switch transistors in at least part of the same row of pixels are electrically connected to the same one scan line. In the driver circuit, the i-th shift register unit is cascaded with the (i+n)-th shift register unit; shift register units supply gate drive signals to the multiple scan lines respectively. The valid pulses of the gate drive signals each have a width denoted as T 0 ; T 0 >(Th+k*Th), 0<k≤(n−1), and Th=1/(F*L), where F denotes the refresh rate of the display panel, and L denotes the number of rows of the multiple pixels; and valid pulses of gate drive signals output by any two adjacent shift register units have a shift amount greater than or equal to Th.