Absolics Inc.

Methods and structures for integrating and enclosing electronic components into compact, multi-functional modules, often involving embedded components, multi-layer substrates, and electromagnetic shielding for performance and miniaturization.

Packaging technologies where bare dies are embedded within a mold compound or substrate cavity, and then interconnected using redistribution layers (RDLs) for fan-out or compact integration, often avoiding through-silicon vias in the chips themselves.

Materials and processes for hermetic encapsulation, conformal coating, optical chip sealing, and stretchable conductors for electronic and optoelectronic devices.

Systems and methods for automated substrate transport, precise positioning, temperature regulation, and chamber environment management to ensure process stability, uniformity, and yield in semiconductor manufacturing.

Development and application of resin compositions, molding compounds, and underfill materials to protect semiconductor devices from environmental factors, moisture, mechanical stress, and for structural integrity.

Novel electrical connection methods within or between package components, including through-glass vias (TGVs), backside contacts, and optimized redistribution layers for improved signal and power integrity.

Application of coatings, layers, or chemical treatments to the surface of glass articles to impart specific functionalities such as UV blocking, anti-whitening, hydrophobicity, or adhesion for subsequent layers.

Manufacturing and processing techniques for producing ultra-thin glass articles, often with enhanced flexibility and mechanical properties, suitable for use as substrates in electronic displays, foldable devices, or other advanced electronics.

Integrated solutions for dissipating heat generated by high-density semiconductor devices within the package, including embedded cooling structures, cold plates, and optimized fluidic channels.

Specialized welding or bonding techniques and apparatuses tailored for joining small-scale electronic components, integrated circuits, or semiconductor wafers, emphasizing precision, miniaturization, and electrical connectivity.

Techniques for stacking multiple semiconductor dies or active layers vertically to achieve higher density and shorter interconnections, often utilizing through-silicon vias (TSVs) or other vertical conductive paths like through-hole electrodes.

Methods for temporarily attaching a wafer or substrate to a carrier for thinning, dicing, or other processing, followed by controlled debonding, often using light-sensitive resins, temporary adhesives, or roughened interfaces.

Glass articles treated with ion exchange or other chemical processes to induce a surface compressive stress layer, enhancing mechanical strength, scratch resistance, and impact toughness.

Specialized cleaning techniques and apparatus designed for removing microscopic contaminants, residues, or films from sensitive substrates, such as semiconductor wafers or flat panel displays, often involving chemical, mechanical, or plasma-based methods.