Company patents

ACM RESEARCH (SHANGHAI), INC.

ACM RESEARCH (SHANGHAI), INC. demonstrates a strong, albeit fluctuating, focus on core semiconductor manufacturing, with Semiconductor Manufacturing Process patents representing 63.4% of its portfolio and experiencing a significant surge in 2024 (YoY +266.7%). While there's a clear emphasis on manufacturing-related Cleaning Processes (22.5% of portfolio), the company also shows an emerging, albeit smaller, interest in Coating & Surface Treatment, which saw a 100.0% YoY growth in 2025 and maintained its patent output so far in 2026.

Patent Trend by Technology Area

Yearly patent publications since 2023

Product themes

Product-level themes inferred from filings since 2023, with category chips showing where each theme appears. Select a theme to filter the patents below.

71 US filings (since 2023) · 8 categories · 9 themes

Precision Substrate and Wafer Cleaning

Specialized cleaning techniques and apparatus designed for removing microscopic contaminants, residues, or films from sensitive substrates, such as semiconductor wafers or flat panel displays, often involving chemical, mechanical, or plasma-based methods.

Cleaning Processes
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36since 2023
-33.3%YoY
Wafer Handling and Process Environment Control

Systems and methods for automated substrate transport, precise positioning, temperature regulation, and chamber environment management to ensure process stability, uniformity, and yield in semiconductor manufacturing.

Semiconductor Manufacturing Process
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26since 2023
-25.0%YoY
Substrate Patterning & Processing

Methods and equipment for applying photoresist uniformly onto wafers, forming patterns through various exposure techniques (e.g., direct imaging, multi-exposure), and integrating patterned layers into semiconductor structures or packaging.

Photolithography
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26since 2023
-50.0%YoY
Advanced Etching & Patterning Control

Techniques for precise material removal, pattern shaping, and controlling etch selectivity or uniformity, often involving plasma, wet chemistry, or directed beams to achieve desired features on semiconductor substrates.

Semiconductor Manufacturing Process
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7since 2023
-60.0%YoY
Advanced Deposition Chamber Hardware

Design and engineering of specialized components within deposition systems, such as heaters, targets, susceptors, and chamber walls, to achieve precise control over process parameters like temperature, material flux, and plasma characteristics.

Coating & Surface Treatment
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5since 2023
new
Chemical Mechanical Planarization & Wet Surface Treatment

Processes involving chemical and mechanical forces to planarize surfaces (CMP) or wet chemical treatments for cleaning, etching, or material removal, often utilizing specialized compositions, nozzles, or fluid management systems.

Semiconductor Manufacturing Process
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4since 2023
0.0%YoY
Conformal & Selective Film Deposition

Methods for depositing thin films with controlled conformality, thickness, and material properties, including selective deposition on specific areas, often using atomic layer deposition (ALD), chemical vapor deposition (CVD), or epitaxial growth.

Coating & Surface Treatment
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3since 2023
+100.0%YoY
Temporary Wafer Bonding & Debonding

Methods for temporarily attaching a wafer or substrate to a carrier for thinning, dicing, or other processing, followed by controlled debonding, often using light-sensitive resins, temporary adhesives, or roughened interfaces.

Semiconductor Manufacturing Process
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2since 2023
0.0%YoY
Advanced Photoresist Materials

Development of novel chemical compositions for photoresists, including polymers, sensitizers, and crosslinking agents, to achieve improved lithographic performance such as resolution, sensitivity, line edge roughness, and etch resistance.

Photolithography
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1since 2023
n/a

Patents

Showing 1-10 of 102

Page 1 of 11
US 20260090329 A1APPLICATION
H01L21/68

WAFER CENTERING ADJUSTMENT APPARATUS AND ADJUSTMENT METHOD

Filed:2023-07-26Pub:2026-03-26
Applicant:ACM RESEARCH (SHANGHAI), INC.

A wafer centering adjustment method, comprising: before a wafer ( 4 ) is etched, a wafer centering system ( 1 ) confirms whether the center of the wafer ( 4 ) coincides with the center of the first adsorption platform ( 3 ), and if not, the wafer centering system ( 1 ) corrects the position of the wafer ( 4 ). After the etching of the wafer ( 4 ) is completed, a wafer edge cleaning effect detection system ( 2 ) confirms whether the center of the wafer ( 4 ) coincides with the center of the first adsorption platform ( 3 ) during the process of etching, and obtains the second offset data. The wafer edge cleaning effect detection system ( 2 ) feeds back the second offset data to the wafer centering system ( 1 ). Before etching the next wafer, the wafer centering system ( 1 ) obtains the first offset data and preforms correction firstly, and then makes a secondary correction to the position of the wafer according to the second offset data obtained after the previous wafer is etched, thereby realizing a closed-loop control of the centering adjustment apparatus. In addition, the degree of coincidence between the center of the wafer and the center of the first adsorption platform is greatly improved by means of the secondary correction, thereby effectively guaranteeing the uniformity of the edge etching width of the wafer.