Amlogic (Shanghai) Co., Ltd.

The present disclosure discloses a clock signal noise reduction device and noise reduction method, and a multi-phase delay phase-locked loop. The clock signal noise reduction device includes a phase generator, a phase selector, and a frequency divider. The phase generator is configured to generate a multi-phase clock signal based on an input signal. The phase selector has an input end connected with an output end of the phase generator, and is configured to select a channel of the multi-phase clock signal based on phase information and assign a delay of a preset period to a clock signal of the selected channel. The preset period is less than a cycle period of the multi-phase clock signal. The frequency divider has an input end connected to an output end of the phase selector, and is configured to perform fractional frequency division on the multi-phase clock signal delayed by the preset period.

Provided are a duty cycle calibration circuit and method, a chip, and an electronic device. In the duty cycle calibration circuit, through a counting clock signal having a higher clock signal frequency than a calibration clock signal, a counting unit is configured to acquire a number of counting pulses generated in a high-level state and a low-level state of the calibration clock signal within a preset counting period, so as to obtain an actual duty cycle of the calibration clock signal. Compared with a method of acquiring a duty cycle of a calibration clock signal by comparing the calibration clock signal with a reference clock signal, inaccurate measurement of the duty cycle of the calibration clock signal after the reference clock signal is affected can be overcome. Therefore, accuracy of measurement of the duty cycle can be improved, and precision of calibration of the duty cycle can be improved accordingly.

A method and module for controlling the code rate of an encoder, and a chip, an electronic device and a storage medium. The method for controlling the code rate of an encoder comprises: when it is detected that an image processor receives an image frame to be processed, acquiring the state of a buffer pool; acquiring a corresponding noise reduction intensity according to the state of the buffer pool; and outputting the acquired noise reduction intensity to the image processor, so that the image processor performs noise reduction processing on the image frame by using the acquired noise reduction intensity, and outputting an image frame, which has been subjected to noise reduction processing, to an encoder, so that the encoder performs encoding processing on the image frame, which has been subjected to noise reduction processing. By means of the solution of the present application, the balance between image quality and an output code rate can be realized while an encoder has a low output code rate.

A memory management method and module, a chip, an electronic device, and a storage medium. The memory management method comprises: scanning memory pages to which virtual addresses of a discontinuous memory mapping space are mapped to acquire a compressible memory page as a first memory page; compressing memory data in the first memory page to acquire corresponding memory compressed data; storing the memory compressed data in a data storage module, the data storage module being located in memory space outside the discontinuous memory mapping space; after storing the memory compressed data in the data storage module, releasing the first memory page; and setting the corresponding virtual address as a page fault address. The memory utilization is improved.

The present disclosure discloses a wireless communication method, a wireless device and a computer storage medium. The wireless communication method includes generating a protocol data unit PPDU and performing a frequency domain resource duplication on the protocol data unit PPDU in units of a resource unit RU to obtain a final protocol data unit PPDU. This method can effectively solve the problem of narrowband interference caused by HB BLE devices to wireless devices.

A phase-locked loop circuit, a phase-locking method, and a frequency synthesizer are provided. The phase-locked loop circuit employs phase-rolling clock signal generator component to perform integer frequency division on multiple oscillation clock signals with uniformly varying phases to obtain multiple feedback clock signals with uniformly varying phases; and according to a preset clock cycle, select feedback clock signals with corresponding phase sequences from the multiple feedback clock signals with uniformly varying phases for concatenation, thereby generating the phase-rolling clock signal. This architecture enables fractional-N frequency division phase-locked loop operation. Compared with conventional fractional-N frequency division phase-locked loop implementations using sigma-delta modulator (SDM) circuits, the proposed solution reduces circuit area and power consumption while improving phase-locked loop performance.

Embodiments of the present disclosure provide a method and device for communication, a WiFi device, and a peer device. The method includes configuring in device coexistence information, wherein the in device coexistence information is used to indicate that a WiFi device supports only reception during a constrained WiFi time window. Embodiments of the present disclosure can effectively reduce the waste of air interface resources and increase the throughput of WiFi devices.

Disclosed are an advertising packet transmission method and system, a device, a storage medium, and a computer program product. The method includes: performing an advertising behavior for multiple times, the advertising behavior being used for transmitting advertising packets, where transmission-related parameters of the advertising behavior are reset at a specific time interval. The present disclosure helps to improve privacy in transmission of advertising packets.

A broadcast packet transmission method and system, a device, a storage medium, and a computer program product are provided. The method includes: obtaining a link layer data packet, the link layer data packet including a target data unit for repeated sending; performing duplication and encoding processing, and encoding the target data unit into a physical layer interval to obtain multiple physical layer intervals respectively carrying same target data unit information as repetition intervals; and sequentially transmitting the multiple repetition intervals. The present disclosure is conducive to improving the robustness of broadcast packet transmission.

A host system, a device system, a data transfer method, a storage medium, and a computer program product are provided. The data transfer method includes: initiating, by a host controller, a data transfer transaction, where each data transfer transaction includes a start-of-frame packet indicating a beginning of the data transfer transaction, a USB standard-based protocol interval exists between two adjacent start-of-frame packets, and when the host controller sends a plurality of data transfer transactions, an interval between two adjacent start-of-frame packets is less than the protocol interval; and performing a physical connection between a host physical layer and a device physical layer to implement a data transfer, where the data transfer has a USB standard-based protocol symbol rate, and during the physical connection, a symbol rate of the data transfer is greater than the protocol symbol rate. The present invention improves USB data transfer efficiency.