Celestial AI Inc.

A package includes a first die with a bridging element with a first interconnect region, a first photonic transceiver portion, a second interconnect region, a first photonic path to an optical interface (OI), and a second photonic path from the OI to the first photonic transceiver portion. The first interconnect region electrically couples the first photonic transceiver portion to a second photonic transceiver portion in an analog/mixed-signal die (AMS die), while the second interconnect region connects a third photonic transceiver portion in a general die to the second photonic transceiver portion using an electrical coupling embedded in the first die. The electrical interconnects in the first interconnect region are less than two millimeters in length.

Various embodiments provide for clock signal distribution within a processor, such as a machine learning (ML) processor, using a photonic fabric.

Various embodiments provide for electro-photonic networks, including a plurality of processing elements connected by bidirectional photonic channels, suited for implementing neural-network models. Weights of the model may be preloaded into memory of the processing elements based on assignments of neural nodes to processing elements implementing them, and routers of the processing elements can be configured to stream activations between the processing elements based on a predetermined flow of activations in the model.

The present disclosure relates to thermal control systems, photonic memory fabrics, and electro-absorption modulators (EAMs). For example, the thermal control systems efficiently move data in a memory fabric based on utilizing and controlling thermally controlling optical components. As another example, the EAMs are instances of optical modulators used to efficiently move data within digital circuits while maintaining thermally-stable optical modulation across a wide temperature range.

Various embodiments provide for a circuit package including an electronic integrated circuit comprising a plurality of processing elements, and a plurality of bidirectional photonic channels, e.g., implemented in a photonic integrated circuit underneath the electronic integrated circuit, that connect the processing elements into an electro-photonic network. The processing elements include message routers with photonic-channel interfaces. Each bidirectional photonic channel interfaces at one end with a photonic-channel interface of the message router of a first one of the processing elements and at the other end with a photonic-channel interface of the message router of a second one of the processing elements and is configured to optically transfer messages (e.g., packets) between the message routers of the first and second processing elements.

One embodiment is a method including forming a partial through-substrate via (TSV) plug in a front side of a wafer, the partial TSV plug having a front side, a back side, and a body with a variable dimension in the body so that a largest dimension is at the back side of partial TSV plug. A cavity is etched in a back side of the wafer that exposes the back side of the partial TSV plug and a portion of a front side interconnect in a common etched cavity. A conductive material is deposited to connect the exposed portion of the front side interconnect to the back side of the wafer and to connect the exposed back side of the partial TSV plug to the back side of the wafer without connecting the partial TSV plug and the portion of the front side interconnect.

A method is described. The method includes creating a partial through-substrate via (TSV) plug in a front side of a wafer, the partial TSV having a front side and a back side. The back side of the partial TSV extending toward a front side of a substrate but not into a bulk of the substrate. A cavity is etched in a back side of the wafer that exposes the partial TSV plug. An insulator is applied to the etched back side of the wafer. A portion of the partial TSV plug is exposed by removing a portion of the insulator. A conductive material is deposited to connect the exposed, partial TSV plug to a surface on the back side of the wafer.

A method is described including creating a partial through substrate via (TSV) plug in a front side of a wafer, the partial TSV plug having a front side and a back side, the back side of the partial TSV extending through the front side of the substrate. A cavity is etched in a back side of the wafer that exposes the back side of the partial TSV plug. An insulator is applied to the etched back side of the wafer. A back side of the partial TSV plug is exposed by removing one or more of a portion of the insulator and a liner. A conductive material is deposited to connect the exposed, back side of the partial TSV plug to a surface on the back side of the wafer.

A package includes a bridging element (an OMIB), and first and second photonic paths, forming a bidirectional photonic path. The OMIB has first and second interconnect regions to connect with one or more dies. Third and fourth unidirectional photonic paths may couple between the first interconnect region and an optical interface (OI). A photonic transceiver has a first portion in the OMIB and a second portion in one of the dies. The first and the second portions may be coupled via an electrical interconnect less than 2 mm in length. The die includes compute elements around a central region, proximate to the second portion. The OMIB may include an electro-absorption modulator fabricated with germanium, silicon, an alloy of germanium, an alloy of silicon, a III-V material based on indium phosphide (InP), or a III-V material based on gallium arsenide (GaAs). The OMIB may include a temperature compensation for the modulator.

A package includes a bridging element (an OMIB), and first and second photonic paths, forming a bidirectional photonic path. The OMIB has first and second interconnect regions to connect with one or more dies. Third and fourth unidirectional photonic paths may couple between the first interconnect region and an optical interface (OI). A photonic transceiver has a first portion in the OMIB and a second portion in one of the dies. The first and the second portions may be coupled via an electrical interconnect less than 2 mm in length. The die includes compute elements around a central region, proximate to the second portion. The OMIB may include an electro-absorption modulator fabricated with germanium, silicon, an alloy of germanium, an alloy of silicon, a III-V material based on indium phosphide (InP), or a III-V material based on gallium arsenide (GaAs). The OMIB may include a temperature compensation for the modulator.