Company patents
Ceremorphic, Inc.
Ceremorphic, Inc. appears to be shifting its patent strategy significantly, with a surprising decline across most categories in 2025 and so far in 2026, following strong growth in 2024. While Computer Hardware Architecture (38.1% of portfolio) and Pulse / Digital Logic Circuits (24.7%) remain core, the dramatic drop in filings for these areas (e.g., Computer Hardware Architecture saw an 86.4% decline in 2025 and 100% so far in 2026) suggests a re-evaluation of priorities, with Cryptographic Mechanisms being a notable exception, showing a 100% YoY growth in 2026 with 2 patents so far.
Patent Trend by Technology Area
Yearly patent publications since 2023
Product themes
Product-level themes inferred from filings since 2023, with category chips showing where each theme appears. Select a theme to filter the patents below.
97 US filings (since 2023) · 12 categories · 16 themes
Novel hardware designs and processing pipelines tailored for specific computational tasks, such as graphics rendering, neural network operations, or matrix transformations, often involving custom circuits, memory arrays, or data flow mechanisms.
Specialized hardware, architectural designs, and computational methods to improve the speed, efficiency, and security of artificial intelligence and machine learning model execution, particularly for inference and data processing.
Hardware and control techniques for optimizing memory access latency, ensuring data integrity, and managing storage resources efficiently. This includes error correction, read/write voltage control, and intelligent data placement or in-memory computation.
Techniques and apparatus for electrically testing semiconductor devices, integrated circuits, or wafers during manufacturing or post-assembly, including built-in self-test (BIST) and contact reliability assessment.
Utilizing dedicated hardware components, secure enclaves, or trusted execution environments to perform cryptographic operations, enhancing security, performance, or isolation from software vulnerabilities.
Development of memory cells utilizing resistive switching or phase-change materials, including novel material compositions, multi-layered structures, and integration with selector devices like bipolar junction transistors, to achieve non-volatile storage.
Systems and methods for encrypting data at a fine-grained level (e.g., per data unit or based on sensitivity) and controlling access to it, often involving delegated authorization, contextual policies, or secure data sharing.
Design and operation of analog and mixed-signal circuits within the memory array, such as page buffers, sense amplifiers, and data latches, responsible for reading and writing data from/to memory cells.
Focuses on using distributed ledger technology (DLT) like blockchain to secure financial transactions, manage digital identities, or ensure data integrity and traceability across various applications.
Digital logic circuits designed to interface with analog sensors or signals, including comparators, input buffers, differential input stages, and logic for processing sensor outputs (e.g., capacitance, optical, touch) for detection or measurement.
Systems and devices that utilize controlled magnetic fields, often generated by electromagnets, to produce mechanical motion, precise positioning, or manipulate physical phenomena like plasma distribution.
Focuses on the architectural and circuit-level innovations for Analog-to-Digital Converters (ADCs) and Digital-to-Analog Converters (DACs) to improve speed, accuracy, linearity, and power efficiency. Includes specific types like SAR and Delta-Sigma, and their constituent components.
Focuses on the physical design, materials, and manufacturing processes for individual memory cells, including transistor structures, interconnects, and multi-layered (3D) architectures to enhance density and performance.
Techniques for generating human-like text or other content using large pre-trained models, often involving prompt engineering, speculative decoding, or multi-modal inputs for content creation.
Techniques for designing and manufacturing compact, multi-functional magnetic components, such as inductors, transformers, and coils, often involving embedded structures, multilayer designs, or shared magnetic circuits to achieve higher power density or smaller form factors.
Enhancements to the physical and data link layers of network communication, focusing on hardware components, signal integrity, power efficiency, and efficient data transfer mechanisms for specific interfaces and buses.
Patents
Showing 1-8 of 8
Hardware-Assisted Cryptographic Operations