Company patents

Cryptography Research, Inc.

Cryptography Research, Inc. surprisingly shows a broad decline in patenting across its core areas, with Cryptographic Mechanisms, its largest category (61.9% of portfolio), experiencing an 11.5% decline in 2025 and a significant 60.9% drop so far in 2026, alongside a consistent decline in Computer Security (down 13.3% in 2025). This suggests a shifting priority away from these foundational areas, despite a brief surge in Computer Hardware Architecture in 2025 (YoY +50.0%) which has since seen a sharp decline so far in 2026.

Patent Trend by Technology Area

Yearly patent publications since 2023

Product themes

Product-level themes inferred from filings since 2023, with category chips showing where each theme appears. Select a theme to filter the patents below.

134 US filings (since 2023) · 9 categories · 13 themes

Hardware-Assisted Cryptographic Operations

Utilizing dedicated hardware components, secure enclaves, or trusted execution environments to perform cryptographic operations, enhancing security, performance, or isolation from software vulnerabilities.

Cryptographic Mechanisms
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66since 2023
-9.5%YoY
Granular Data Encryption & Access Controlfiltered

Systems and methods for encrypting data at a fine-grained level (e.g., per data unit or based on sensitivity) and controlling access to it, often involving delegated authorization, contextual policies, or secure data sharing.

Cryptographic Mechanisms
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48since 2023
0.0%YoY
Secure Data Storage & Provenance

Techniques for protecting data at rest or in backup, ensuring its integrity, confidentiality, and verifiable origin, often involving encryption, unique identifiers, or secure repositories.

Computer SecurityNetwork Security & Access Control
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24since 2023
-60.0%YoY
Memory System Performance & Reliability

Hardware and control techniques for optimizing memory access latency, ensuring data integrity, and managing storage resources efficiently. This includes error correction, read/write voltage control, and intelligent data placement or in-memory computation.

Computer Hardware Architecture
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16since 2023
+50.0%YoY
AI/ML for Cryptographic Security

Applying artificial intelligence and machine learning techniques to enhance cryptographic systems, such as generating encryption models, improving zero-trust architectures, or enabling privacy-preserving computations like federated learning.

Computer SecurityCryptographic Mechanisms
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15since 2023
+40.0%YoY
Secure Key Management & Rotation

Methods and systems for generating, distributing, updating, rotating, and securely destroying cryptographic keys to maintain data confidentiality and integrity over time, including quantum key distribution.

Cryptographic Mechanisms
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14since 2023
-20.0%YoY
Homomorphic Encryption Acceleration

Techniques for improving the performance, efficiency, or practicality of fully homomorphic encryption (FHE) schemes, often involving hardware accelerators or optimized algorithms for operations like bootstrapping and key-switching.

Cryptographic Mechanisms
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12since 2023
-20.0%YoY
Access Control & Identity Management

Systems and methods for authenticating users, devices, or applications, authorizing their access to resources based on policies, and managing digital identities across various platforms.

Network Security & Access ControlComputer Security
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11since 2023
new
Specialized Compute Architectures

Novel hardware designs and processing pipelines tailored for specific computational tasks, such as graphics rendering, neural network operations, or matrix transformations, often involving custom circuits, memory arrays, or data flow mechanisms.

Computer Hardware Architecture
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9since 2023
0.0%YoY
Secure Data Sharing & Rights Management

Mechanisms to facilitate the secure exchange of data between different entities or systems while enforcing usage policies, managing digital content rights, and ensuring data consistency during replication or transfer.

Computer Security
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3since 2023
new
On-Chip Power Management & Protection

Integrated circuits or sub-circuits designed to regulate, balance, or protect power delivery within a device, often involving specific transistor and capacitor arrangements.

Computer Hardware Architecture
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3since 2023
0.0%YoY
Cloud Security Posture Management

Tools and processes for assessing, monitoring, and improving the security configuration and external accessibility of resources deployed within cloud computing environments.

Network Security & Access Control
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2since 2023
new
Location-Aware Mobile Services

Mobile applications and systems leveraging wireless communication and location data (e.g., GPS, RFID, geo-fencing) to provide context-specific services, transactions, or user interactions.

Wireless Networks
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1since 2023
n/a

Patents

Page 8 of 8
US 20210058228 A1APPLICATION
H04L9/00

PROTECTING BLOCK CIPHER COMPUTATION OPERATIONS FROM EXTERNAL MONITORING ATTACKS

Filed:2020-09-01Pub:2021-02-25
Applicant:Cryptography Research, Inc.

Systems and methods for protecting block cipher computation operations, from external monitoring attacks. An example apparatus for implementing a block cipher may comprise: a first register configured to store a first pre-computed mask value represented by a combination of a first random value and a second random value; a second register configured to store an output mask value, wherein the output mask value is an inverse permutation function of the first random value; a third register configured to store a second pre-computed mask value represented by a combination the first pre-computed mask value and a permutation function of the output mask value; a fourth register configured to store an input mask value, wherein the input mask value is a combination of an expansion function of the first random value and a key mask value; a non-linear transformation circuit configured to apply the expansion function to a masked round state, perform a non-linear transformation of a combination of a masked key with an output of the expansion function, and apply the permutation function to the output of the non-linear transformation, wherein the non-linear transformation is defined using the input mask value stored in the fourth register and the output mask value stored in the second register; and two round feedback circuits configured to swap the masked round state produced by the non-linear transformation and combine the masked round state with the first pre-computed mask value stored in the first register and the second pre-computed mask value stored in the third register.