D2S, INC.

Some embodiments provide a method for optimizing a mask layout for producing masks for manufacturing an integrated circuit (IC) by defining multiple layers of components on a substrate. The method generates, based on a first mask layout, a simulated wafer image including representations of IC components that are predicted to be manufactured for a first layer of the IC based on a received mask layout for the first layer. The method compares the simulated wafer image to a target wafer image including optimal representations of the IC components for the first layer. The comparison uses data regarding locations of components in at least one additional layer that interact with components in the first layer. Based on the comparison, the method modifies the first mask layout to generate a modified second mask layout for the first layer.

Some embodiments provide a method for optimizing a mask layout for producing masks that are used for manufacturing an integrated circuit (IC) comprising multiple layers of components. The method receives a mask layout including a set of mask images corresponding to a first layer of components of the IC that is adjacent to at least a second layer of components. The method generates a first wafer image including representations of IC components that are predicted to be manufactured for the first layer based on the received set of mask images corresponding to the first layer. Based on a positional relationship between at least one predicted IC component in the first wafer image and at least one predicted IC component in a second wafer image for the second layer, the method modifies at least one mask image in the set of mask images for the first layer.

Systems for reticle enhancement technology (RET) for use with variable shaped beam (VSB) lithography include a device configured to determine an initial mask pattern from a desired pattern for a substrate; a device configured to calculate a first substrate pattern from the initial mask pattern; a device configured to determine an initial set of VSB shots based on the initial mask pattern; a device configured to calculate a second substrate pattern from a simulated mask pattern calculated with the initial set of VSB shots; a device configured to compare the first substrate pattern with the second substrate pattern; and a device configured to adjust the initial set of VSB shots until the second substrate pattern and the first substrate pattern are within a predetermined tolerance, creating an adjusted set of VSB shots.

Methods for reticle enhancement technology include inputting a target wafer pattern, the target wafer pattern spanning an entire design area, and iterating a proposed mask for the entire design area until the proposed mask meets criteria towards producing the target wafer pattern. Each iteration includes calculating a predicted wafer pattern from the proposed mask. The calculating comprises calculating a cost and derivative data, the cost and the derivative data being based on comparing the predicted wafer pattern to the target wafer pattern. The cost further comprises specifications for mask manufacturability.

Methods and systems for fracturing a pattern to be exposed on a surface using variable shaped beam (VSB) lithography include inputting an initial pattern; calculating a first substrate pattern from the initial pattern; overlaying the initial pattern with a two-dimensional grid, wherein an initial set of VSB shots are formed by a union of the initial pattern with locations on the grid; and merging two or more adjacent shots in the initial set of VSB shots to create a larger shot in a modified set of VSB shots; and outputting the modified set of VSB shots. The methods and systems also include calculating a calculated pattern to be exposed on the surface with the modified set of VSB shots; and calculating a second substrate pattern from the calculated pattern to be exposed on the surface.

Methods for reticle enhancement technology (RET) for use with variable shaped beam (VSB) lithography include determining an initial mask pattern from a desired pattern for a substrate; calculating a first substrate pattern from the initial mask pattern; determining an initial set of VSB shots that will form the initial mask pattern; calculating a simulated mask pattern from the initial set of VSB shots; calculating a second substrate pattern from the simulated mask pattern; and adjusting the initial set of VSB shots, wherein the adjusting of the initial set of VSB shots creates an adjusted set of VSB shots.

Methods incorporate variable side wall angle (VSA) into calculated patterns, using a mask 3D (M3D) effect. Embodiments include inputting a mask exposure information and determining the M3D effect. Determining the M3D effect may include determining the VSA. Embodiments may include calculating a VSA; and calculating a pattern on a substrate using the calculated VSA, wherein calculating the pattern on the substrate includes a mask 3D effect.

Methods for reticle enhancement technology include representing a target wafer pattern or a predicted wafer pattern as a smooth function captured as a function sample array (FSA). The FSA is an array of sampled values of the smooth function, which is a continuous differentiable function. Methods also include providing a continuous tone mask (CTM), wherein the CTM is used to produce the predicted wafer pattern, the predicted wafer pattern spanning an entire design area.

Some embodiments use a machine-trained network during routing to provide the router with sufficient information to improve the quality of routes generated by a router. This machine-trained network in some embodiments is referred to as the “digital twin” of a lengthy design and/or manufacturing process that produces the design of an IC layout and/or manufactures an IC based on a designed IC layout. The digital twin in some embodiments provides information regarding parasitics, regarding redundant vias for insertion or regarding complexity of subsequent manufacturing processes used to manufacture an IC based on the IC design layout.

Methods for fracturing a pattern to be exposed on a surface using variable shaped beam (VSB) lithography include inputting an initial pattern; calculating a first substrate pattern from the initial pattern; overlaying the initial pattern with a two-dimensional grid, wherein an initial set of VSB shots are formed by a union of the initial pattern with locations on the grid; and merging two or more adjacent shots in the initial set of VSB shots to create a larger shot in a modified set of VSB shots; and outputting the modified set of VSB shots. The method also includes calculating a calculated pattern to be exposed on the surface with the modified set of VSB shots; and calculating a second substrate pattern from the calculated pattern to be exposed on the surface.