PHISON ELECTRONICS CORP.

A memory management method, a memory storage device and a memory control circuit unit are disclosed. The method includes: activating a data merge operation; selecting a plurality of first-type physical units and a second-type physical unit from a rewritable non-volatile memory module to execute the data merge operation, wherein a data capacity of each first-type physical unit is less than a data capacity of each second-type physical unit; during a first execution period of the data merge operation, copying first data from a first physical unit in a stable state among the first-type physical units to the second-type physical unit; and during the first execution period, storing second data from a host system to a second physical unit not in the stable state among the first-type physical units.

A data storage method, a memory storage device, and a memory control circuit unit are provided. The method includes: receiving at least one write command instructing to store target data from a host system; encoding the target data to generate parity data; and respectively storing the target data and the parity data in a first physical management unit and a second physical management unit, and each of the first physical management unit and the second physical management unit crosses multiple chip enabled (CE) regions. In addition, in the first physical management unit, first data is stored in a first chip enabled region among the chip enabled regions. In the second physical management unit, first parity data for protecting the first data is stored in a second chip enabled region among the chip enabled regions, and the first chip enabled region is different from the second chip enabled region.

A memory control method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: sending a plurality of read command sequences configured to instruct a rewritable non-volatile memory module to read a first physical unit by using a plurality of read voltage levels; after the read command sequences are sent, receiving first data from the rewritable non-volatile memory module, where the first data includes replacement data corresponding to a plurality of first bits reflecting a read result of a first memory cell by using the read voltage levels, and a data amount of the first data is less than a total data amount of the first bits; after the first data is received, performing data restoration on the first data to obtain a plurality of second bits; performing a decoding operation according to the second bits.

A control circuit unit includes: a target circuit unit, a plurality of detection circuit units, a plurality of local counters, a global counter, and a management circuit unit. The detection circuit units are disposed in a plurality of local areas of a target area within the control circuit unit, and the target area encompasses the target circuit unit. The detection circuit unit is used to send a first signal in response to a determination of receiving an external electromagnetic attack. The plurality of local counters update the number of recorded localized attack in response to receiving the first signal. The global counter accumulates the number of localized attacks to update the number of recorded globalized attacks. The management circuit unit issues a warning notification based on the number of globalized attacks and the number of localized attacks of each local counter.

A memory operation method, a memory storage device, and a memory control circuit unit are disclosed. The memory operation includes following steps. First data is received from a host system. The first data is stored into a first physical unit which is mapped to a first logical unit. In a first operation mode, a target calculation is performed based on the first data and second data stored in a second physical unit to obtain third data, and the third data is different from the first data. The third data is stored into a third physical unit which is also mapped to the first logical unit. The third data is transmitted to the host system.

A regulator circuit module, a memory storage device, and a voltage control method are disclosed. The voltage control method includes: generating an output voltage according to an input voltage by a driving circuit; generating a feedback voltage according to the output voltage; and controlling the driving circuit by a first regulator circuit to adjust the output voltage in response to a current change caused by the feedback voltage.

A memory management method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: receiving first data from a host system; encoding the first data to generate first parity data based on a first code rate; storing the first data and the first parity data in a plurality of first physical management units; collecting second data from a rewritable non-volatile memory module; encoding the second data to generate second parity data based on a second code rate, wherein the first code rate is different from the second code rate; and storing the second data and the second parity data in a plurality of second physical management units.

A decoding method, comprising: sending a first read command sequence corresponding to a host system to read a first physical unit of a physical unit group to obtain a first data frame; responding to a decoding failure of a first single-frame decoding performed on the first data frame, sending a plurality of second read command sequences to read a plurality of second physical units in the physical unit group to obtain a plurality of second data frames; respectively performing a second single-frame decoding on the second data frames; performing a XOR operation on the corresponding data frame of each physical unit of the physical unit group to obtain first error evaluation information; generating enhanced first error evaluation information based on the first error evaluation information; and performing a third single-frame decoding on the first data frame based on the enhanced first error evaluation information.

A method of writing data, including: obtaining a write instruction; writing a first data of write data to a target physical unit in a target word line of a plurality of word lines in accordance with the write instruction; after writing the first data, when the target word line has one or more empty physical units arranged after the target physical unit, selecting one or more further target physical unit respectively located in one or more further target word lines; and writing second data connected after the first data in the write data to the selected further target physical units, wherein the one or more further target word lines are arranged after the target word line.

A memory management method, a memory storage device, and a memory control circuit unit are provided. The method includes: in a first operation mode, setting a physical management unit to cross N physical regions in a rewritable non-volatile memory module; in a second operation mode, setting the physical management unit to cross M physical regions in the rewritable non-volatile memory module, wherein N is greater than M; and accessing the rewritable non-volatile memory module based on the physical management unit.