PHOENIX PIONEER TECHNOLOGY CO., LTD.

A package carrier board includes a first circuit build-up structure, a patterned magnetic conductive metal layer, a plurality of first conductive pillar, a second insulating layer, and a second circuit build-up structure. The patterned magnetic conductive metal layer is disposed above the first circuit build-up structure, and the cross-sectional pattern of the patterned magnetic conductive metal layer is L-shaped and/or U-shaped. The first conductive pillars are disposed on the first circuit build-up structure and located outside of the patterned magnetic conductive metal layer. The second insulating layer covers the patterned magnetic conductive metal layer and the first conductive pillars. The second circuit build-up structure is disposed on the second insulating layer. The first circuit build-up structure, the first conductive pillars, the second insulating layer, and the second circuit build-up structure are combined to form an inductive circuit structure. Additionally, a manufacturing method for the package carrier board is also disclosed.

A hollow antenna substrate includes at least three layers of substrate structure. The first layer of the substrate has a first patterned metal layer and a first dielectric layer, with the first patterned metal layer embedded within the first dielectric layer, and a first upper surface and a first lower surface of the first patterned metal layer exposed to the first dielectric layer. The second layer is stacked on the first layer and has a second dielectric layer with a second patterned opening formed therein. The third layer is stacked on the second layer and has a third patterned metal layer and a third dielectric layer, with the third patterned layer embedded in the third dielectric layer and a third upper surface and a third lower surface exposed. The second patterned opening forms a hollow structure. A manufacturing method for the hollow antenna substrate is also provided.

A component-embedded packaging structure is provided, in which a plurality of metal layers are formed on an inactive surface of a semiconductor chip so as to serve as a buffer portion, and the semiconductor chip is disposed on a carrying portion with the buffer portion via an adhesive. Then, the semiconductor chip is encapsulated by an insulating layer, and a build-up circuit structure is formed on the insulating layer and electrically connected to the semiconductor chip. Therefore, the buffer portion can prevent delamination from occurring between the semiconductor chip and the adhesive on the carrying portion if the semiconductor chip has a CTE (Coefficient of Thermal Expansion) less than a CTE of the adhesive.

A semiconductor package carrier structure is provided and includes a substrate body, a dielectric material, and a patterned circuit layer. The substrate body has a plurality of openings, a plurality of conductive pillars, and at least one die placement portion. The dielectric material is disposed in the plurality of openings. The patterned circuit layer is disposed on a surface of the substrate body. Side surfaces of the plurality of conductive pillars and the die placement portion are all in a concave arc shape. The patterned circuit layer includes a die placement pad corresponding to the die placement portion and a plurality of bonding pads corresponding to the plurality of conductive pillars. A method of manufacturing the semiconductor package carrier structure is further provided.

A semiconductor package carrier board structure is provided and includes a substrate body, a first dielectric material, and a second dielectric material. The substrate body has a first surface, a second surface opposite to the first surface, a plurality of first openings recessed from the first surface, a plurality of second openings recessed from the second surface, and a plurality of third openings. Two ends of the plurality of third openings are connected to the plurality of first openings and the plurality of second openings. The plurality of first openings are filled with the first dielectric material. The plurality of second openings and the plurality of third openings are filled with the second dielectric material. A method of manufacturing the semiconductor package carrier board structure is further provided.

A sensing device includes a sensing chip, which has an active face with a sensing region and a metal pad region having at least a metal pad thereon; a dielectric layer, which covers a periphery, back surface and a part of the active surface of the sensing chip, and the first face of the dielectric layer has an elevation higher than the active face of the sensing chip and exposes the sensing region of the sensing chip; a first conductive wire layer and a second conductive wire layer, which are disposed on the first and second faces of the dielectric layer respectively; a conductive pillar, which is disposed within the dielectric layer and connected to the first and second conductive wire layers; and a front-face fan-out circuit, which is connected to the first conductive wire layer and the metal pad of the sensing chip.

A semiconductor packaging substrate structure is provided and includes a circuit build-up structure and at least one winding spiral coil. The circuit build-up structure has at least one first patterned wiring layer, a first dielectric layer, a second dielectric layer, and a third dielectric layer. The winding spiral coil is composed of an enameled wire. The first patterned wiring layer is embedded in the third dielectric layer. The winding spiral coil is embedded in the second dielectric layer. The first patterned wiring layer and the winding spiral coil are electrically connected to each other. A manufacturing method of the semiconductor packaging substrate structure is further provided.

The present invention discloses a manufacturing method of a composite-type micro-inductor, including following steps. A first step involves providing a first substrate, which includes a first dielectric layer and a magnetic assembly. The magnetic assembly is disposed on the first dielectric layer. A second step involves providing a second substrate, which includes a second dielectric layer, a patterned circuit layer, and an opening. The patterned circuit layer is stacked in a plurality of layers, and the opening penetrate the second dielectric layer. At least a part of the patterned circuit layer is embedded in the second dielectric layer. A third step involves placing the second substrate on the first substrate by threading the magnetic assembly through the opening. A fourth step involves covering the first substrate and the second substrate with a third dielectric layer, and finally forming the composite-type micro-inductor.

An antenna module is provided, in which an antenna supporting substrate having a step-shaped hollow cavity is disposed on a circuit structure having an antenna part, so that the antenna part is exposed from the step-shaped hollow cavity, and an antenna structure is arranged on the steps of the step-shaped hollow cavity to cover the antenna part and is electromagnetically coupled with the antenna part, and there is no barrier but an air medium between the antenna structure and the antenna part.

An inductor structure is provided and includes a bottom element, at least one intermediate element and a top element. The bottom element includes a first inductance circuit portion. The intermediate element is stacked on the bottom element and includes at least one second inductance circuit portion and at least one magnetically permeable body. The top element is stacked on the intermediate element and includes a third inductance circuit portion. The first inductance circuit portion, the second inductance circuit portion and the third inductance circuit portion constitute an inductance coil, and the magnetically permeable body is located within the inductance coil and is free from being electrically connected to the inductance coil. A method of manufacturing the inductor structure is further provided.